User`s guide

Configurable Machine State
ICR: Interprocessor Communication Register (2000 1F40)
8: AUX Halt
0 = no halt - AUX mode not supported
6: ICR interrupt enable
0 = interprocessor interrupts disabled - only
uniprocessor config. allowed
5: Local memory external access enable
0 = external access disabled* - OpenVMS configures map
QBMBR: Q-Bus Map Base Address Register (2008 0010)
28:15: address where 8K QBus mapping register are located
(undefined at reset)
SHAC:
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NOTE: all SHAC registers are set up by OpenVMS driver
PQBBR: Port Queue Block Base Register (2000 4248)
20:0: upper bits of physical address of base of Port Queue
block. Contains HW version, FW version, shared host
memory version and CI port maintenance ID at power-up.
PPR: Port Parameter Register (2000 4258)
31:29: Cluster size. For SHAC value = 0.
28:16: Internal buffer length = 0* (For SHAC value = 1010 hex)
7:0: Port number. Same as SHAC’s DSSI ID.
PMCSR: Port Maintenance Control and Status Register (2000 425C)
2: Interrupt enable
0 = disabled*
1: Maintenance timer disable
0 = enabled*
SGEC:
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NOTE: all SGEC registers are set up by OpenVMS driver
NICSR0: Vector Address, IPL, Synch/Asynch Register (2000 8000)
31:30: Interrupt priority
00 = 14*
29: Synch/Asynch bus master operating mode
0 = asynchronous*
15:0: Interrupt vector = 0003hex*
D–6 Configurable Machine State