User`s guide

Configurable Machine State
0: D_enable
1 = enable PCache for INVAL, D-stream read/write/fill
CCTL: CBox Control Register (IPR A0)
30: Software ETM
0 = disabled* - diagnostic use only
16: Force NDAL parity error - off - diagnostic use only
15:11: Performance monitoring bits (0*) - diagnostic use only
10: Disable CBox write packer
0 = write packer enabled* - improves write latency
9: Read timeout time base
0 = external time base
8: Software ECC
0 = use correct ECC*
7: Disable BCache errors
0 = BCache errors detected*
6: Force Hit
0 = disabled* - diagnostic use only
5:4: BCache size
00 = 128 KB* (KA50/52)
10 = 512 KB (KA51/53)
3:2: Data store speed
00 = 2 cycle read, 3 cycle write* (KA51/53/54/56)
01 = 3 cycle read, 4 cycle write (KA50/52)
10 = 4 cycle read, 5 cycle write (KA55)
1: Tag store speed
0 = 3 cycle read, 3 cycle write* (KA51/53/54/56)
1 = 4 cycle read, 4 cycle write (KA50/52/55)
0: Enable BCache
1 = enabled
CQBIC:
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SCR: System Configuration Register (2008 0000)
14: Halt enable
1 = BHALT to CQBIC HALTIN pin to cause halts
12: Page prefetch disable
1 = map prefetch disabled - historical latency reasons
7: Restart enable
0 = QBus restart causes ARB power-up reset*
3:1: ICR offset address select bits
0 = (AUX mode not supported)*
Configurable Machine State D–5