User`s guide

Data Structures and Memory Layout
C.1 Halt Dispatch State Machine
Table C–1 (Cont.) Firmware State Transition Table
Current
State
Next
State
Halt
Type
Halt
Code
Mailbx
Action
User
Action
HEN-ERR-TIP-
DIP-BIP-RIP
Perform conditional initialization
1
ENTRY –>OTHER
INIT
xxx xx xx xxx x - x - x - x - x - x
Perform common initialization
2
RESET INIT –>INIT xxx xx xx xxx x - x - x - x - x - x
BREAK
INIT
–>INIT xxx xx xx xxx x - x - x - x - x - x
TRACE INIT –>INIT xxx xx xx xxx x - x - x - x - x - x
OTHER
INIT
–>INIT xxx xx xx xxx x - x - x - x - x - x
Check for external halts
3
INIT –>BOOTSTRAP 101 00 xx xxx x - x - x - x - x - x
INIT –>HALT xxx 00 xx xxx x - x - x - x - x - x
Check for pending (NEXT) trace
4
INIT –>TRACE xxx 10 xx xxx x - x -1-x-x-x
TRACE –>EXIT xxx 10 xx xxx x - 0 - 1 - x - x - x
TRACE –>HALT xxx xx xx xxx x - x - x - x - x - x
1
Perform a unique initialization routine on entry. In particular, power-ups, BREAKs, and TRACEs require
special initialization. Any other halt entry performs a default initialization.
2
After performing conditional initialization, complete common initialization.
3
Halt on all external halts, except:
if DCOK (unlikely) and halts are disabled, bootstrap
if SGEC remote trigger, bootstrap
4
Unconditionally enter the TRACE state, if the TIP flag is set and the halt was due to a HALT instruction.
From the TRACE state the firmware exits, if TIP is set and ERR is clear; otherwise it halts.
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Data Structures and Memory Layout C–3