User`s guide

Address Assignments
A.5 Processor Registers
Table A–1 (Cont.) Processor Registers
Number
Register
Name Mnemonic (Dec) (Hex) Type Impl Cat
I/O
Address
Mbox
Pcache
Parity
Address
PCADR 242 F2 R NVAX 2-5
Reserved 243 F3 NVAX 2-6
Mbox
Pcache
Status
PCSTS 241 F4 RW NVAX 2-5
Reserved 245 F5 NVAX 2-6
Reserved 246 F6 NVAX 2-6
Reserved 247 F7 NVAX 2-6
Mbox
Pcache
Control
PCCTL 248 F8 RW NVAX 2-5
Reserved 249 F9 NVAX 2-6
Reserved 250 FA NVAX 2-6
Reserved 251 FB NVAX 2-6
Reserved 252 FC NVAX 2-6
Reserved 253 FD NVAX 2-6
Reserved 254 FE NVAX 2-6
Reserved 255 FF NVAX 2-6
Unimplemented 100–
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Address Assignments A–19