User`s guide

• Appendix A gives the address assignments.
• Appendix B describes ROM partitioning and subroutine entry points.
• Appendix C gives definitions of the key global data structures used by the
CPU firmware.
• Appendix D gives the normal state of all configurable bits in the CPU
module as they are left after the successful completion of power-up ROM
diagnostics.
• Appendix E describes how the CPU firmware partitions the SCC 1 KB
battery-backed-up (BBU) RAM.
• Appendix F gives MOP counters.
• Appendix G describes the error codes and messages that the system
exerciser test generates.
• Appendix H gives a list of related documents.
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