Service manual

Table 4–13: <REFERENCE>(XRP) Registers in <REFERENCE>(XMI)
Private Space
Register Mnemonic Address
Control Register Write Enable CREGWE 2000 0000
Console ROM (halt protected) 2004 0000 to 2007 FFFF
Console EEPROM (halt protected) 2008 0000 to 2008 7FFF
Console ROM (not halt protected) 200C 0000 to 200F FFFF
Console EEPROM (not halt
protected)
2010 0000 to 2010 7FFF
RSSC Base Address SSCBAR 2014 0000
RSSC Configuration SSCCNR 2014 0010
RSSC Bus Timeout Control SSCBTR 2014 0020
RSSC Output Port OPORT 2014 0030
RSSC Input Port IPORT 2014 0040
Control Register Base Address CRBADR 2014 0130
Control Register Address Decode Mask CRADMR 2014 0134
EEPROM Base Address EEBADR 2014 0140
EEPROM Address Decode Mask EEADMR 2014 0144
Timer 0 Control TCR0 2014 0160
Timer 0 Interval TIR0 2014 0164
Timer 0 Next Interval TNIR0 2014 0168
Timer 0 Interrupt Vector TIVR0 2014 016C
Timer 1 Control TCR1 2014 0170
Timer 1 Interval TIR1 2014 0174
Timer 1 Next Interval TNIR1 2014 0178
Timer 1 Interrupt Vector TIVR1 2014 017C
RSSC Interval Counter SSCICR 2014 01F8
RSSC Internal RAM 2014 0400 to 2014 07FF
IP IVINTR Generation IPINTR 2101 0000 to 2101 FFFF
WE IVINTR Generation WEINTR 2102 0000 to 2102 FFFF
<REFERENCE>(XRP) Scalar Processor 4–65