Service manual

3.16 <REFERENCE>(XYP) Registers

The <REFERENCE>(xyp) registers consist of the processor

status longword, internal processor registers, <REFERENCE>(xyp)

registers in <REFERENCE>(XMI) private space, <REFER-

ENCE>(XMI) required registers, and 16 general purpose reg-

isters.

Table 3–10: <REFERENCE>(xyp) Internal Processor Registers

Kernel Stack Pointer KSP IPR0 R/W 1

Executive Stack Pointer ESP IPR1 R/W 1

Supervisor Stack Pointer SSP IPR2 R/W 1

User Stack Pointer USP IPR3 R/W 1

Interrupt Stack Pointer ISP IPR4 R/W 1

Reserved IPR5–IPR7 3

P0 Base Register P0BR IPR8 R/W 1

P0 Length Register P0LR IPR9 R/W 1

P1 Base Register P1BR IPR10 R/W 1

P1 Length Register P1LR IPR11 R/W 1

Key to Types:

R–Read

W–Write

R/W–Read/write

Key to Classes:

1–Implemented by the <REFERENCE>(xyp), speciﬁed in the VAX Architecture Refer-

ence Manual.

2–Implemented uniquely by the <REFERENCE>(xyp).

3–Not implemented. Read as zero; NOP on write.

4–Access not allowed; accesses result in a reserved operand fault.

5–Accessible, but not fully implemented; accesses yield UNPREDICTABLE results.

n I–The register is initialized on <REFERENCE>(xyp) reset (power-up, system re-

set, and node reset).

3–54 VAX 6000 Models 300 and 400 Service Manual