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target of the operation. Really it does one or several memcpy to CHARON core from

provided buffer.

To perform the operation, the initiator invokes a routine identified by the write_mem field of

the chapi_in descriptor. The initiator provides in the addr parameter a starting bus address

of the memory region to write to, in the len parameter the length of transaction (length of

transfer), and in the buf parameter the address of private buffer to transfer from. The

procedure is invoked as follows:

const chapi_in * ci = …;

if (ci->write_mem) {

unsigned int t_len = ci->write_mem(ci, addr, len, buf);

if (t_len < len) {

}

The example above shows that the CHARON core is not obliged to support the indicated

operation. It indicates why the device instance must remember the chapi_in descriptor.

Note the processing of the result in the example above. The condition (t_len < len) might be

considered by the initiator as an attempt to write non-existent memory.

4.12 Synchronizing execution with the CPU thread

Synchronizing execution with the CPU instruction interpretation thread belongs to the

“Synchronization request” class of operations. Such an operation is initiated by the device

instance. The CHARON core is defined as the target of the operation. More precisely the

CPU instruction interpretation thread is required to respond to the operation.

To perform the operation, the initiator invokes a routine identified by the put_ast field of the

chapi_in descriptor. The initiator provides in the fun argument an entry point to the

procedure to be synchronized with the CPU instruction interpretation thread, and in the

arg1 and the arg2 arguments additional parameters to be passed later on to that

procedure. The “fun” procedure will be executed after certain number of emulated CPU

instructions, specified in “delay”. The procedure is invoked as follows:

const chapi_in * ci = …;

if (ci->put_ast) {

ci->put_ast(ci, delay, fun, arg1, arg2);

}

The example above shows that the CHARON core is not required to support the indicated

operation. It also shows why the device instance must memorize the chapi_in descriptor.

4.13 Synchronized invocation with the CPU thread(s)

Synchronized invocation (with the CPU instruction interpretation thread) belongs to the

class of operations called “Synchronization request acknowledge”.The CHARON core

initiates such an operation. The device instance is defined as the target of the operation.