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}
The example above shows that the device is not obliged to support the indicated
operation. Which means that it is allowed to supply 0 for the brq_ack parameter when
connecting a bus interrupt to the bus through the connect_bus_request entry point of the
chapi_in descriptor. Note that the CHAPI defines an additional argument, supplied through
the arg1 and the arg2 parameters, to help the target dispatching requests.
The bus request acknowledge procedure indicated by the brq_ack parameter must return
the interrupt vector in case of acknowledgement. In this case the CHARON core uses the
returned value as the interrupt vector instead of the vector supplied through the previous
call to the connect_bus_request procedure. If the bus request is not acknowledged, the bus
request acknowledge procedure shall return zero (0) indicating that the interrupt vector is
not valid.
The CHAPI guarantees that the bus request acknowledge procedure identified by the
brq_ack argument is invoked in the execution context synchronized to the CPU instruction
interpretation thread.
4.10 Reading emulator memory (DATA-OUT DMA)
Reading CHARON memory belongs to the “Direct Memory Access” class of operations.
This operation is initiated by the device instance. The CHARON core is defined as the
target of the operation. Really it does one or several memcpy from CHARON core to
provided buffer.
To perform the operation, the initiator invokes a routine identified by the read_mem field of
the chapi_in descriptor. The initiator provides in the addr parameter a starting bus address
of the memory region to read from, in the len parameter the length of transaction (length of
transfer), and in the buf parameter the address of the private buffer to transfer to. The
procedure is invoked as follows:
const chapi_in * ci = …;
if (ci->read_mem) {
unsigned int t_len = ci->read_mem(ci, addr, len, buf);
if (t_len < len) {
}
}
The example above shows that the CHARON core is not obliged to support the indicated
operation. It shows why the device instance must remember the chapi_in descriptor. Note
the processing of the result in the example above. The condition (t_len < len) might be
considered by the initiator as an attempt to read non-existent memory.
4.11 Writing emulator memory (DATA-IN DMA)
Writing CHARON memory belongs to the “Direct Memory Access” class of operations.
Such an operation is initiated by the device instance. The CHARON core is defined as a