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In order to perform the operation, the initiator invokes a routine identified by the
destroy_io_space field of the chapi_in descriptor. The initiator is to provide an I/O space
identifier in the sid argument. The procedure is invoked as follows:
io_space_id_t sid = …;
const chapi_in * ci = …;
if (ci->destroy_io_space) {
ci->destroy_io_space(ci, sid);
}
The example above shows that the CHARON core is not obliged to support the indicated
operation. But nevertheless it is guaranteed that the CHARON core does either support
both the create_io_space and the destroy_io_space procedures, or does not support any of
them. Also, it gives a clue why the device instance is supposed to remember the I/O
space identifier returned in the previous call to create_io_space procedure (see above), and
the chapi_in descriptor.
4.5 Changing I/O space bus location
The operation of changing (additional) I/O space bus location belongs to the class of
operations previously called “Access to device control and status registers”. Such an
operation is initiated by the device instance when it is in the execution context
synchronized to the CPU instruction interpretation thread. The CHARON core is defined
as the target of the operation.
In order to perform the operation, the initiator invokes a routine identified by the
move_io_space field of the chapi_in descriptor. The initiator is to provide an I/O space
identifier in the sid argument and new bus location of the I/O space in the addr and the len
arguments. The combination of the addr and the len shall meet the following requirements:
• The length of the address range indicated by the len must be a power of two. Or more
formally:
(len & (len - 1)) == 0
• The address range shall be naturally aligned. Which means that the addr shall be
aligned to a boundary that is multiple of the len. Or more formally:
(addr + (len - 1)) == (addr | (len - 1))
The procedure is invoked as follows:
io_space_id_t sid = …;
const chapi_in * ci = …;
if (ci->move_io_space) {
ci->move_io_space(ci, sid, addr, len);
}
The example above shows that the CHARON core is not obliged to support the indicated
operation. Also, it gives a clue why the device instance is supposed to remember the I/O