User manual

processing such an operation as soon as possible. Note that the CHARON can run

several CPU emulation threads.

• Setup bus requests. Such an operation is only initiated by CHARON core with loadable

device as a target. CHARON core notify loadable component that it is a right time to

setup bus requests, i.e. connect them to the bus for service.

• Set/initiate the interrupt on the bus. Such an operation is only initiated by the device

instance. The target of the operation must remember the bus interrupt request.

• Request for a bus interrupt acknowledge. Such an operation is only initiated by the

CPU emulation thread. Therefore the target shall finish processing such an operation

as soon as possible.

• Direct memory access. Such an operation is only initiated by the device instance. Note

that it is just DMA emulation, really it is just one or several memcpy to or from

CHARON core.

• Synchronization request. Such an operation is only initiated by the device instance.

The target of the operation must remember the synchronization request.

• Synchronization request acknowledgment. Such an operation is only initiated by the

CPU emulation thread. Therefore the target shall finish processing such an operation

as soon as possible.

• A request for processing bus power events.

• A request for processing bus reset events.

• A request to process loadable component defined configuration options. Can only be

initiated by device and processed by CHARON core.

• A request for changing the configuration and support requests.

• A message log request.

• Protection and license verification.

• Bus adapter support requests (could require Stromasys consulting).

• Replacement hardware support requests (could require Stromasys consulting).

• Versioning information support requests.

The side of the CHAPI communication that is a target of a transaction have to provides a

routine for processing the transaction. This routine is identified by an entry point stored in

either the chapi_in or the chapi_out descriptors, depending on the operation. Thus