User manual

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QBUS ADAPTER BASED ON PCIS3BASE PCI BOARD ............................ 37
RL11/RLV12 ........................................................................................................ 39
TS11/TSV05 ......................................................................................................... 40
VT30-H ................................................................................................................. 42
VT30-TV ............................................................................................................... 43
THE UNIBUS ADAPTER .................................................................................. 43
THE VCB02 GRAPHIC CONTROLLER ........................................................ 44
THE LPV11 .......................................................................................................... 44
2. CHAPI PROGRAMMING CONCEPTS .................................................... 46
2.1 Overview ......................................................................................................... 46
2.2 Loadable component naming conventions ................................................. 46
2.3 Component loading and initialization .......................................................... 47
2.4 Communication context binding .................................................................. 48
2.5 Run-time communication .............................................................................. 49
2.6 Notes on threading ........................................................................................ 51
3. THE CHAPI COMMUNICATION CONTEXT DESCRIPTORS ................. 52
3.1 The CHAPI_IN communication context descriptor ..................................... 52
3.2 The CHAPI_OUT communication context descriptor ................................. 68
3.3 Initialization steps .......................................................................................... 72
3.4 Run-time execution contexts ........................................................................ 72
4. CHAPI OPERATION ............................................................................... 75
4.1 Reading the device control and status register .......................................... 75
4.2 Writing device control and status register .................................................. 75
4.3 Creating additional I/O space ....................................................................... 75
4.4 Destroying I/O space ..................................................................................... 76
4.5 Changing I/O space bus location ................................................................. 77
4.6 Disconnecting I/O space ............................................................................... 78
4.7 Connecting I/O space .................................................................................... 78
4.8 The legacy way to process interrupts .......................................................... 79
4.8.1 Requesting a bus interrupt................................................................................................................... 79
4.8.2 Removing a bus interrupt request ........................................................................................................ 79
4.8.3 Bus interrupt acknowledge .................................................................................................................. 80
4.9 The recommended way to process interrupts ............................................ 81
4.9.1 Connect bus request to the bus ........................................................................................................... 81
4.9.2 Set bus request.................................................................................................................................... 82