Instruction manual

4
Address ASIC Registers
(400/500/600/700/800/900 Models)
In 400/500/600/700/800/900 models, the address ASIC controls access to two
regions of I/O space: the region used to read from and write to the memory
configuration registers and the region used either to write to the victim address
counter register or to read the victim address register.
1
This chapter covers the following topics:
• Memory configuration registers (Section 4.1)
• VAR/VACR victim address register and counter register (Section 4.2)
1
In 300 models, hardware performs mapping, and software can read a single MCR for
fault analysis.
Address ASIC Registers (400/500/600/700/800/900 Models) 4–1