Instruction manual

3.3.8 Scatter/Gather Map
Scatter/gather registers are described in Chapter 5.
3.3.9 TURBOchannel Reset Register (TCRESET)—1.C2A0.0000
Any I/O write operation to the TURBOchannel reset register causes a
full TURBOchannel reset cycle of 250 ms duration. An attempt to access
TURBOchannel I/O space during this time causes the transaction to be delayed
until the reset operation is completed.
This reset affects only the TURBOchannel slots (including CoreIO, SCSI, and
CXTurbo). It does not affect IOSLOT, TCCONFIG, FADR, TCEREG, IR, the SG
map, the MCRs, and the TC state machine. This register should be used only in
an emergency, for example, if a TURBOchannel device is behaving erratically and
not accepting I/O write operations to reset it individually.)
TCRESET does not respond to I/O read operations.
The register’s format and contents are:
Bits Access Init. Description
31:0 W TURBOchannel reset
TURBOchannel I/O Registers 3–19