Instruction manual

Bits Access Init. Description
31 R 0 Scatter/gather parity error
Table 11 IMR—1.C281.FFFC
Bits Access Init. Description
5:0 W 0 TURBOchannel interrupt mask for the option slots
(0=Enable, 1=Disable)
31:6 W IGNORED
Writing the Interrupt Mask Register
The interrupt mask register can be written using any of the dense space
scatter/gather map addresses. By convention, use the address given in
Table 11, 1.C281.FFFC.
3–16 TURBOchannel I/O Registers