Instruction manual

3.2.2 TURBOchannel Control and Status Register (TCSR)—1.E000.0008
The TURBOchannel control and status register (TCSR) indicates which
TURBOchannel option was involved in a failing transaction. The register’s
format and contents are:
05 04 03 02 01 0031
T
C
4
MR−0066−93RAGS
TT
CC
T
2
C
31
T
C
0
Bit Access Name Description
0 R TC active port[0] When set along with an error bit in IR, indicates
that TC Option 0 was involved in the failing
transaction. Locked when the error is logged;
released when the error is cleared. Initializes to a
random value.
1 R TC active port[1] When set along with an error bit in IR, indicates
that TC Option 1 was involved in the failing
transaction. Locked when the error is logged;
released when the error is cleared. Initializes to a
random value.
2 R TC active port[2] When set along with an error bit in IR, indicates
that TC Option 2 was involved in the failing
transaction. Locked when the error is logged;
released when the error is cleared. Initializes to a
random value.
3 R TC active port[3] When set along with an error bit in IR, indicates
that TC Option 3 was involved in the failing
transaction. Locked when the error is logged;
released when the error is cleared. Initializes to a
random value.
4 R TC active port[4] When set along with an error bit in IR, indicates
that TC Option 4 was involved in the failing
transaction. Locked when the error is logged;
released when the error is cleared. Initializes to a
random value.
3–4 TURBOchannel I/O Registers