Instruction manual

3.2 I/O Control and Status Registers (300 Models)
All CSRs are quadword-aligned but use only the first longword of the quadword.
Note
The status of unused bits in the CSRs is UNDEFINED and must be
masked out by software.
Table 9 lists TURBOchannel control and status registers:
Table 9 TURBOchannel Control and Status Registers (300 Models)
Start
Address
End
Address Size Register Access Discussed In
1.E000.0000 1.E000.0003 4 B Interrupt register R Section 3.2.1
1.E000.0004 1.E000.0007 Reserved
1.E000.0008 1.E000.000B 4 B TURBOchannel control
and status register
(TCSR)
R Section 3.2.2
1.E000.000C 1.E000.000F Reserved
1.E000.0010 1.E000.0013 4 B Memory configuration
register (MCR)
R Section 3.2.3
1.E000.0014 1.E000.0017 4 B Reserved
1.E000.0018 1.E000.001B 4 B Diagnostic LED register
(LED)
W Section 3.2.4
1.E000.001C 1.E000.001F 4 B Reserved
3–2 TURBOchannel I/O Registers