Instruction manual

2.3 I/O Address Spaces
You use Load and Store memory instructions to map and access I/O space.
Note
Accessing nonexistent memory locations and nonexistent I/O registers
in the TURBOchannel address space yield UNPREDICTABLE results.
Accessing a non-existent I/O device on TURBOchannel causes the bus
timeout.
The 4 GB of I/O space is divided into 8 512-MB slots corresponding to I/O ports.
• Address bits <31:29> select a slot.
• Slots are further divided into dense and sparse space.
Physical address bit <28> determines whether an address is in dense
(PA<28>=0) or sparse (PA<28>=1) space. Addresses in slots that are allocated
neither to dense nor to sparse space are reserved. (Appendix A discusses
dense and sparse space allocation and the I/O mapping operations it requires.)
The size of the dense and sparse space in a slot varies according to DEC 3000
AXP model:
Model Dense Sparse Remainder
500, 500S, 500X, 800,
900
32 MB 64 MB Reserved
400, 400S, 600, 700 32 MB 64 MB Reserved
300, 300L, 300X,
300LX
64 MB 128 MB Reserved
Table 6 is the I/O address map of the 300 models. Table 7 is the I/O address map
of the 400/500/600/700/800/900 models.
Memory and I/O Addressing 2–3