Instruction manual

Figure 27 HWRPB Per-CPU Slot
PALcode Revision
Processor Revision
MR−0151−93RAGS
Bootstrap / Restart HWPCB
Per−CPU Slot State Bits
PALcode Memory Space Length
Physical Address of PALcode Memory Space
SLOT
PALcode Scratch Space Length
Physical Address of PALcode Scratch Space
Processor Type
Processor Variation
Processor Serial Number
Halt PCBB
Halt Procedure Value
Reason for Halt
Reserved for Software
Reserved
+0
+88
+90
+98
+A0
+A8
+B0
+B8
+C0
+C8
+E8
+F0
+F8
+100
+108
+110
+118
Halt PC
Halt PS
Halt Argument List
Halt Return Address List
+128
+120
+80
+E0
+D8
Logout Length
Logout Memory Address
Console 16–39