Instruction manual

Table 38 (Cont.) System Error/Interrupt Matrix
Error
Code
for
Logout
Frame
What Happened,
Who saw it,
What they did,
What is most likely broken,
What else is possibly broken
How
Reported,
PAL
Entry
Point
1
PAL Action
SCB
Offset
2
IPL
NA Powerup 0000 run
reset
code
31
1
All PAL entry points are relative to the contents of the PAL_BASE register.
2
All SCB entry points are relative to SCBB.
Table 39 CPU State Before SCB Routines
Location Contents
BC_TAG Result of most recent Bcache tag probe or Bcache tag probe that resulted
in an error
BIU_ADDR Physical address associated with errors in BIU_STAT[7:0]
BIU_STAT Status associated with external command errors
DC_STAT Status associated with internal DCache errors
EXC_ADDR PC of excepting instruction or current instruction at time of interrupt or
trap
EXC_SUM Summary of arithmetic traps
FILL_ADDR Physical address associated with errors in BIU_STAT[14:8]
FILL_
SYNDROME
Syndrome on any fill QW where an ECC error is detected
HIRR Record of all currently outstanding interrupts
PC SCB + error-specific offset
PS[CM] Kernel mode
PS[IPL] IPL of this error
R2 First QW at SCB location
R3 Second QW at SCB location
R4 Addr (mchk logout frame)
SP Kernel stack pointer
Individual errors are discussed next. PAL action in the double error case is not
discussed. In the case of a machine check during machine check processing, PAL
is activated at PAL_BASE + 0000 as if HALT were asserted. Operating-system
intervention does not occur in this case, which is handled similarly to Console
Halts in VAX systems.
Table notes
Faults, Arithmetic Traps, ASTs, Data Alignment Traps, other synchronous
traps, and software interrupts do not generate logout frames. They do
vector into the SCB and create stack frames. See the Alpha Architecture
Reference Manual for SCB offsets and further information.
10–10 Hardware Exceptions and Interrupts