Instruction manual

Table 38 System Error/Interrupt Matrix
Error
Code
for
Logout
Frame
What Happened,
Who saw it,
What they did,
What is most likely broken,
What else is possibly broken
How
Reported,
PAL
Entry
Point
1
PAL Action
SCB
Offset
2
IPL
NA HALT switch pushed
CPU via HALT interrupt
Dispatch to PAL
Nothing
Halt
Interrupt
00E0
Dispatch to
PAL_BASE
+ 0000
NA NA
06=Rd
07=WR
Bcache TPE during DMA
Cache PALs
DMA abort, See below
Bcache tag store RAM
BC external parity tree
UnCorr
Interrupt
00E0
See
algorithm
below
0660 31
08 TC parity error on DMA
TC ASIC
DMA abort, See below
TC option
TC ASIC or transceivers
UnCorr
Interrupt
00E0
Build stack
Build large
logout,
R= ~isr.seo
Call OS
0660 31
09=Rd
0A=Wr
S/G parity error on DMA
ELVIS ASIC
DMA abort, see below
S/G RAM
ELVIS ASIC
UnCorr
Interrupt
00E0
Build stack
BUILD large
logout,
R= ~isr.seo
Call OS
0660 31
0B=Rd
0C=Wr
S/G entry Not Valid, DMA
TC PALs
DMA abort, see below
Software
TC option
UnCorr
Interrupt
00E0
Build stack
Build large
logout,
R= ~isr.seo
Call OS
0660 31
0D TC I/O Read parity error
TC ASIC
I/O error, see below
software
ELVIS ASIC
UnCorr
Interrupt
00E0
Build stack
Build large
logout,
R=~isr.seo
Call OS
0660 31
0E=Rd
0F=Wr
Invalid I/O address
TC ASIC
Invalid I/O address error, see
below
software
ELVIS ASIC
UnCorr
Interrupt
00E0
Build stack
Build large
logout,
R=~isr.seo
Call OS
0660 31
10 DMA burst too big
TC PALs
DMA abort, see below
Software
TC option
UnCorr
Interrupt
00E0
Build stack
Build large
logout,
R=~isr.seo
Call OS
0660 31
11 DMA crossed 2 KB boundary
TC PALs
DMA abort, see below
Software
TC option
UnCorr
Interrupt
00E0
Build stack
Build large
logout,
R=~isr.seo
Call OS
0660 31
1
All PAL entry points are relative to the contents of the PAL_BASE register.
2
All SCB entry points are relative to SCBB.
(continued on next page)
Hardware Exceptions and Interrupts 10–7