Instruction manual

8.2.4 SCSI[x] DMA Interrupt Control Register (DICx0)—1.8004.1x04/1.C004.1x04
The DICx consists of four 8-bit sections. The lowest byte controls the DMA; the
three high bytes are reserved.
The register’s format and contents are:
07 0008151624 2331
MR−0100−93RAGS
RESERVED RESERVED RESERVED CONTROL
Bit Access Reset Description
0 R/W 0 DMA Address<0> (Valid only in unaligned data
case)
1 R/W 0 DMA Address<1> (Valid only in unaligned data
case)
5:2 R/W 0 Reserved
6 R/W 0 DMA read prefetch, disable(0)/enable(1)
7 R/W 0 DMA direction, read(0)/write(1)
15:8 R 0 Reserved
23:16 R 0 Reserved
31:24 R 0 Reserved
TURBOchannel Dual SCSI ASIC 8–9