Instruction manual

• Chapter 9 describes programming considerations and restrictions for I/O
transactions—I/O read and write restrictions, DMA, interrupt handling
during I/O operations, TURBOchannel usage (system-specific), JUNKIO
subsystem, and the dual SCSI interface.
• Chapter 10 discusses the behavior of the system under hardware exceptions
and interrupts—sources of errors and interrupts, behavior of system hardware
under errors, system error/interrupt matrix, dual SCSI error/interrupt matrix,
error insertion for testing purposes, assignment of CPU interrupt pins, error
handling and recovery, and PAL recovery algorithms for selected errors.
• Chapter 11 discusses processor and Bcache initialization.
• Chapter 12 gives an overview of DEC 3000 AXP firmware.
• Chapter 13 discusses DEC 3000 AXP firmware ROMs—firmware ROM
format, system and I/O ROM contents, and system ROM format.
• Chapter 14 discusses firmware power-up initialization and entry—power-on
initialization flow, map of memory following power-up initialization, machine
state following power-up initialization, SROM routines, and system firmware
entry.
• Chapter 15 discusses configuration information saved by power-up
initialization code—the main configuration table and the device configuration
tables.
• Chapter 16 discusses the console device, console saved state, console program,
and console data structures, and gives an overview and descriptions of console
service routines.
• Chapter 17 discusses DEC 3000 AXP PALcode—location, entering PALcode,
supported CALL_PAL instructions, MACHINE_RESET PALcode, machine-
check PALcode, and INTERRUPT PALcode.
• Chapter 18 discusses TURBOchannel support.
• Chapter 19 discusses nonvolatile RAM and its data structures.
• Appendix A discusses the use of dense and sparse space in I/O programming—
the layout of dense and sparse addressing locations, the required number
of transactions to complete operations through dense and sparse space,
minimum read and write granularity of operations through dense and sparse
space, the effect of load and store instructions in dense and sparse space,
byte-masked I/O read operations, and mapping I/O Addresses.
• A Glossarycontains useful terms and their meaning.
Associated Documents
• Alpha Architecture Handbook (EC–H1689–10)
• Alpha Architecture Reference Manual (EY–L520E–DP)
• Bt459 RAMDAC Specification
• DECchip 21064 Microprocessor Chip Data Sheet (EC–F1720–10)
• DECchip 21064-AA Microprocessor Hardware Reference Manual (EC–N0079–
72)
• DEC 3000 Model 300/300L/300X/300LX AXP Service Documentation Kit
(EK–PELSV–DK)
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