Instruction manual

Bits Access Function
13 R ISDN Interrupt
This bit records the state of the interrupt from the ISDN audio chip.
Set when the 79C30A needs interrupt service. Updated every 125
s,
remains active until the ISDN audio chip interrupt register is read or
the ISDN audio chip is reset.
14 R In 300 models, serial ROM Console Select bit used with bit <14>: 1 =
power up to SROM console; 0 = power up to System ROM console
In 400/500/600/700/800/900 models, reserved
<15:14> Indicate the console device selected:
<15> <14> Selected Console
X 1 Mini-console port; Digital use only.
0 0 The system powers up and connects to the graphics
port as the main console.
15 R In 300 models, console select bit used with bit <14>: 0 = graphics
port, 1 = serial communications port
In 400/500/600/700/800/900 models, reserved
16 R/W0C LANCE DMA memory read error
This bit is set to 1 and DMA disabled, when the LANCE DMA
encounters a memory read error. The LANCE then times out and
interrupts the processor, which handles the problem. The LPR can
read the address of the error. The bit may be cleared by writing a 0;
writing a 1 has no effect.
17 R/W0C Reserved
18 R/W0C Reserved
19 R/W0C Reserved
20 R/W0C ISDN DMA memory read or overrun error
This bit is set and DMA disabled, when the buffer pointer is not
reloaded in a timely manner. When set, the bit indicates an overrun
condition, because the data buffer space is exhausted. The bit may be
cleared by writing a 0 to it.
This bit is also set and DMA disabled, when the ISDN DMA
encounters a memory read error while performing a DMA operation.
The bit may be cleared by writing a 0 to it.
21 R/W0C ISDN DMA receive buffer pointer loaded interrupt
This bit is set whenever the ISDN receive DMA buffer pointer
associated with the ISDN port is loaded into the ISDN receive DMA
pointer register. Software uses this bit at an interrupt to cause a
new buffer pointer to be loaded into the ISDN receive buffer pointer
register. This interrupt is cleared by writing 0.
22 R/W0C ISDN DMA transmit buffer pointer loaded interrupt
This bit is set whenever the ISDN transmit DMA buffer pointer
associated with the ISDN port is loaded into the ISDN transmit DMA
pointer register. Software uses this bit as an interrupt causing a new
buffer pointer to be loaded into the ISDN transmit buffer pointer
register. The interrupt is cleared by writing a 0.
23 R/W0C Reserved
IOCTL ASIC and System Registers 7–13