Instruction manual

7.3.12 System Interrupt Register (SIR)—1.A004.0110/1.E004.0110
The SIR consists of two sections.
• Bits <31:16> are set by the DMA engine for various DMA conditions. These
bits are always set by the system and can be cleared by writing a 0 to them.
Writing a 1 has no effect. These Bits are cleared to 0 during system powerup
/reset.
• Bits <15:0> reflect the status of specific system devices and are read-only. A
few are not usually used as interrupts and should be masked. Bits may or
may not be reset to 0 during system powerup reset, depending on the state of
the interrupting device.
The register’s format and contents are:
All bits are UNPREDICTABLE on reset.
Bits Access Function
0 R In 300 models, reserved for Halt switch debouncer
In 400/500/600/700/800/900 models, reserved
1 R In 300 models, reserved for Halt switch debouncer
In 400/500/600/700/800/900 models, reserved
2 R In 300 models, TURBOchannel option slot 0 interrupt
In 400/500/600/700/800/900 models, reserved
3 R In 300 models, TURBOchannel option slot 1 interrupt
In 400/500/600/700/800/900 models, alternate console indicator
When set, indicates that the alternate console is selected for video
output instead of the monitor. The printer port doubles as an
alternate console port.
4 R Reserved
5 R Reserved
6 R SCC(0) Serial interrupt (communication 1 and mouse)
Generated by SCC(0), which contains both the Communication port
1 (channel B) and the mouse port UART (channel A). Software must
read SCC(0) internal registers to determine the appropriate course of
action.
7 R SCC(1) Serial interrupt (communication 2 and keyboard)
Generated by SCC(1), which contains both the printer port (channel
B) and the keyboard port UART (channel A). Software must read
SCC(1) internal registers to determine the appropriate course of
action.
8 R Ethernet interrupt
Records the state of the interrupt from the LANCE.
9 R Secure console indicator
This bit indicates the position of the secure console jumper. A set
bit indicates to the console code that this is a secure system and a
password must be entered.
10 R Reserved
11 R Reserved
12 R Reserved
7–12 IOCTL ASIC and System Registers