Instruction manual

7.3.8 ISDN Receive DMA Pointer—1.A004.00A0/1.E004.00A0
This is the address that the ISDN DMA uses when receiving data intended for
main memory. This register is undefined at power up and must be loaded with
the appropriate value before DMA.
The register’s format and contents are:
Bits Access Reset Function
4:0 R/W UNP DMA physical address <33:29>
31:5 R/W UNP DMA physical address <28:2>
7.3.9 ISDN Receive DMA Buffer Pointer—1.A004.00B0/1.E004.00B0
This is the address to be loaded into the ISDN DMA Pointer when the Pointer
reaches a page (4 KB) boundary. This register is undefined at power up and must
be loaded with the appropriate value before DMA.
The register’s format and contents are:
Bits Access Reset Function
4:0 R/W UNP DMA physical address <33:29>
31:5 R/W UNP DMA physical address <28:2>
7.3.10 Data buffers 3-0—1.A004.00C0-1.A004.00F0/1.E004.00C0-1.E004.00F0
The data buffers are general purpose 32-bit read-write registers used by the
IOCTL ASIC. These registers may be read from and written to for test purposes.
A DMA or an access to a peripheral device may overwrite these registers. To
ensure proper testing all DMA engines must be disabled.
The registers’ format and contents are:
Bits Access Reset Function
31:0 R/W UNP General purpose
IOCTL ASIC and System Registers 7–9