Instruction manual

7.2 System FEPROM
Depending on the setting of SSR<26>, The IOCTL can perform single-byte read
and write operations or quad-byte read operations with the system ROM.
• SSR<26>=0
Four read operations are performed on an 8-bit wide ROM. The IOCTL places
the four bytes in one 32-bit word, with the first byte in the least significant
byte position. A longword is returned to the CPU, and software reads the
ROM one longword at a time.
• SSR<26>=1
A single ROM access is enabled. A read or write operation from or to ROM
space results in a single access to the ROM, with the ‘‘byte’’ signals being
driven with the contents of SSR<25:24>.
Note
Write operations to ROM space are single-access, regardless of SSR<26>’s
setting. This mode is used to modify the FEPROM. The access is
otherwise identical to the generic device access.
7–4 IOCTL ASIC and System Registers