User manual

TECHNICAL REFERENCE

8-25

S14 0 Reserved

S15 0 Bit-mapped register setup. To set the register, see instructions for S13.

Bit Value Result

0 1 Disable ARQ/MNP for V.22.

1 2 Disable ARQ/MNP for V.22bis.

2 4 Disable ARQ/MNP V.32/V.32bis.

3 8 Disable MNP handshake.

4 16 Disable MNP level 4.

5 32 Disable MNP level 3.

6 64 MNP incompatibility.

7 128 Disable V.42 operation.

To disable V.42 detect phase, select the total of the values for bits 3

and 7 (in other words S15 = 136 [the sum of values 8 and 128])

S16 0 Reserved

S17 0 Reserved