User's Manual

Solutions for a Real Time World
ANTHIAS BLE Module
User Manual
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Copyright Unigen Corporation, 2012
The table below shows the possible UART settings for the ANTHIAS module.
Table 10: Anthias UART Parameters
Parameter Possible Values
Baud Rate
Minimum
1200 baud (≤2% Error)
9600 baud (≤1% Error)
Maximum 2Mbaud (≤1% Error)
Flow Control CTS/RTS
Parity None, Odd or Even
Number of stop bits 1 or 2
Bits per byte 8
Note: The maximum baud rate during Deep Sleep is 9600 baud.
SPI Master Serial Flash Interface
The SPI Serial Flash Interface is only available if Anthias is ordered and configured without the
internal EEPROM option on the module. The SPI master memory interface in the Anthias module
is overlaid on the internal I²C EEPROM interface and uses 3 other specific PIOs for the additional
signaling. See the table on the next page for more details.
PIO[2] is used to power the Serial Flash upon boot up to read the contents and load into RAM.
After loading the contents, PIO[2] is de-asserted to shut down the Serial Flash for power savings.
Figure 6: External Serial EEPROM Circuitry