Datasheet

M54HC4024
M74HC4024
October 1992
7 STAGE BINARY COUNTER
B1R
(Plastic Package)
ORDER CODES :
M54HC4024F1R M74HC4024M1R
M74HC4024B1R M74HC4024C1R
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
PIN CONNECTIONS (top view)
NC =
No Internal
Connection
DESCRIPTION
.HIGH SPEED
t
PD
= 13 ns (TYP.) AT V
CC
=5V
.LOW POWER DISSIPATION
I
CC
=4µA (MAX.) AT T
A
=25°C
.HIGH NOISE IMMUNITY
V
NIH
=V
NIL
=28%V
CC
(MIN.)
.OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
|= I
OL
= 4 mA (MIN.)
.BALANCEDPROPAGATION DELAYS
t
PLH
=t
PHL
.WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO 6 V
.PIN AND FUNCTION COMPATIBLE
WITH 4024B
The M54/74HC4024 is a high speed CMOS 7-
STAGE BINARY COUNTER fabricated in silicon
gate C
2
MOS technology. It has the same high
speed performance of LSTTL combined with true
CMOS low power consumption. The HC4024 is a 7
stage Counter. This devices is incremented on the
falling edge (negative transition) of the input clock,
and all its outputs are reset toa low level by applying
a logical high on their reset input. All inputs are
equipped with protection circuits against static dis-
charge and transient excess voltage.
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