Data Sheet

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SPI Communication
4
SPI Communication
4.1
Protocol and Timing
The transferred data bits via MOSI (Master Out Slave In) and MISO (Master In Slave Out) are defined
as follows:
A15….A00 = 16-bit register address
W15….W00 = 16-bit write data (in write mode)
X15….X00, Y15 = 16-bit read data or previous command (depending on mode)
R15…R0 = 16-bit read data in read mode or previous data in write mode
Parameter
Symbol
Min
Typ
Max
Unit
SCK frequency
0
16
MHz
SCK pulse width HI
SCKhi
15
ns
SCK pulse width LO
SCKlo
15
ns
SCK setup time before data read
A2DRs
15
ns
CS_N enable setup time before SCK
CSEs
10
ns
CS_N enable hold time after SCK
CSEh
10
ns
CS_N disable setup time before SCK
CSDs
10
ns
CS_N disable hold time after SCK
CSDh
10
ns
MOSI setup time before SCK
MOSIs
10
ns
MOSI hold time after SCK
MOSIh
10
ns
MISO delay after SCK
MISOd
10
ns
MISO enable delay after CS_N
MISOE
d
10
ns
MISO high Z delay after CS_N
MISOZ
d
10
ns
SPI timing
parameters