User Manual

MPU-6000/MPU-6050 Register Map and

Descriptions

Document Number: RM-MPU-6000A-00

Revision: 4.2

Release Date: 08/19/2013

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4.31 Register 116 – FIFO Read Write

FIFO_R_W

Type: Read/Write

(Hex)

(Decimal)

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

116

FIFO_DATA[7:0]

Description:

This register is used to read and write data from the FIFO buffer.

Data is written to the FIFO in order of register number (from lowest to highest). If all the FIFO enable

flags (see below) are enabled and all External Sensor Data registers (Registers 73 to 96) are

associated with a Slave device, the contents of registers 59 through 96 will be written in order at the

Sample Rate.

The contents of the sensor data registers (Registers 59 to 96) are written into the FIFO buffer when

their corresponding FIFO enable flags are set to 1 in FIFO_EN (Register 35). An additional flag for

the sensor data registers associated with I

C Slave 3 can be found in I2C_MST_CTRL (Register 36).

If the FIFO buffer has overflowed, the status bit FIFO_OFLOW_INT is automatically set to 1. This bit

is located in INT_STATUS (Register 58). When the FIFO buffer has overflowed, the oldest data will

be lost and new data will be written to the FIFO.

If the FIFO buffer is empty, reading this register will return the last byte that was previously read from

the FIFO until new data is available. The user should check FIFO_COUNT to ensure that the FIFO

buffer is not read when empty.

Parameters:

FIFO_DATA 8-bit data transferred to and from the FIFO buffer.