User's Manual
Digital UHF Transmitter Chapter 5, Detailed Alignment Procedures
DT835A, Rev. 1 5-5
5.2.3 (A15-A1) UHF Generator
Board (1565-1109)
The (A15-A1) UHF generator board is
mounted in (A15) the UHF generator
enclosure. This procedure should be
performed to align this board.
In the Manual Adjust Set Up position, W1
on J4 between Pins 2 & 3, on (A13) the
PLL board (1286-1104), adjust R12 for
–2.5 volts at J6 pin 2.
Connect J1, the sample output of the
section of the UHF generator board, to a
spectrum analyzer, tuned to the crystal
frequency, and peak tuning capacitors C6
and C18 for maximum output. Also tune
L2 and L4 for maximum output. The
output level should be about +5 dBm.
The channel oscillator should maintain an
oven temperature of 50° C.
If a spectrum analyzer is not available,
connect a digital voltmeter (DVM) to TP1
on the UHF generator board. Tune
capacitor C32 for maximum voltage at
TP1.
Connect J2, the sample output of the
channel oscillator, to a suitable counter
and tune C11, the coarse adjust, to the
crystal frequency. The fine frequency is
controlled by the external PLL circuit
when in the Auto mode.
Caution: Do not re-peak C32. This
can change the output level.
Connect a spectrum analyzer to J2, the
output jack of the board.
Tune C32, C34, C38, C40, C44, and C46
for maximum output. Re-adjust all of the
capacitors to minimize the seventh and
the ninth harmonics of the channel
oscillator frequency. They should be
down at least -30 dB without affecting
the output of the UHF generator board.
If a spectrum analyzer is not available, a
DC voltmeter can be used. When a
voltmeter is used, the harmonic
frequencies must be minimized to
prevent interference with other channels.
While monitoring each test point with a
DC voltmeter, maximize each test point
by tuning the broadband multipliers in
the following sequence:
• Monitor TP1 with a DVM and tune C32
for maximum (typical 0.6 VDC).
• Monitor TP2 and tune C34 and C38
for maximum (typical 1.2 VDC).
• Monitor TP3 and tune C40 and C44
for maximum (typical 2.0 VDC).
• Monitor TP4 and tune C46 for
maximum.
• Repeak C40 and C38 while
monitoring TP4 (typical 3.5 VDC).
• The typical output level is +15 dBm.
5.2.4 (Optional) (A14-A1) 10-MHz
Reference Generator Board (1519-
1126)
Monitor J1 with a spectrum analyzer.
Adjust C12 for a maximum 10-MHz
signal.
Attach a frequency counter. Tune C3 for
a coarse frequency adjustment close to
10 MHz and C2 for exactly 10 MHz. Re-
adjust C12 for peak signal amplitude at
J1 using the spectrum analyzer. Adjust
R15 to maintain a constant crystal
temperature of 50° C.
5.2.5 (A13) PLL Board (1286-1104)
Check that Jumper W1 on J4 is between
Pins 2 and 3 and that R12 is adjusted for
–2.5 volts at J6-2. Adjust C11 on the
(A15-A1) UHF generator board (1565-
1109) for the correct channel oscillator
frequency. Monitor J10 on the board.
Install jumper W1 between J4-1 and J4-
2. With switches SW1, SW2, and SW3 in
the positions shown in Table 5-5 (refer
to the PLL board schematic [1286-
3104]), the PLL Unlock LED should go
out.