User's Manual

300-Watt Digital UHF Transmitter Chapter 5, Detailed Alignment Procedures
DT830A, Rev. 1 5-15
The DC outputs (+15, +5, and -15 VDC)
from the switching power supply
(1049886) are directed to jack J1. The
voltages are then filtered by C1 to C6
and fed to voltage regulators U1 to U7.
The outputs are protected from
overcurrent conditions by the regulators.
The regulators are designed to fold back
the voltage if a short-circuit condition
occurs externally and will continue to do
so until the short is eliminated. If a short
appears, the on-board LED associated
with that regulator will extinguish with
the loss of output.
5.3.8 (A8) VSB IF Filter Board
(1047976; Appendix D)
The VSB IF filter board provides low-
pass filtering for frequencies above 63
MHz.
The board receives the output IF signal
from the vector modulator board at J1.
The input signal is fed through the 50-Ω
matching circuit of R1, R2, and R3. The
signal is then filtered by low-pass filter
circuit L1 to L5 and C2 to C6. The signal
is amplified by U1 and fed to SMA
connector J2. The signal is also fed
through the IF sample circuit of U2 and
associated components to J4, IF sample.
This sample is fed to the front panel
sample port.
The voltage to this board is supplied by
an external +12 VDC source.
5.3.9 (A3) LED Board (1561-1204;
Appendix D)
The LED board provides front panel
verification of the status of the MPEG
input signal, 10-MHz reference signal,
and phase-locked status of the IF
oscillator and the +5-VDC power supply.
DS1 is driven from the VSB modulator
board and provides a constant +5 VDC
to J1-1 and a logic low at J1-2 when the
MPEG input signal is present. DS2 is
driven from the local oscillator board
and provides a constant +5 VDC and a
logic low at J1-4 when the 10-MHz
reference signal is present at the
oscillator board. DS3 is driven from the
local oscillator board and provides a
constant +5 VDC and a logic low at J1-6
when the IF oscillator is phase locked.
DS4 is driven from the +5-VDC source
on the power supply board through J1-7.
5.3.10 Offset Adjust
1. Set gain potentiometers R32 and
R105 to the center of their travel.
2. Remove the jumper that connects
the center pins of J5 and J6. Connect
a voltmeter to TP4.
3. Adjust R5 until less than 1 mV
appears on the voltmeter. This sets
the offset of the I channel to zero.
4. Remove the jumper that connects
the center pins of J9 and J10. The
voltmeter is placed on TP8.
5. Adjust R78 until there is less than 1
mV on the voltmeter. This sets the
offset of the Q channel to zero.
5.3.11 Local Oscillator Leak-Through
Adjustment
1. With the setup in the same
configuration as it was at the end of
step 5 of the Offset Adjust
procedure, connect a spectrum
analyzer to J5. Set the spectrum
analyzer to look at the 44-MHz
center frequency with a 15-MHz
span.
2. Since the offset to the mixer is now
zero, the output of the mixer that
blends the in-band signal (0V) with
the LO should now be zero. With the
spectrum analyzer, adjust C29 and
R58 until the local oscillator does not
have a presence at 46.69056 MHz on
the spectrum analyzer. This same
process is repeated for the Q
channel. The spectrum analyzer is
connected to J9, and C32 and R79