Assembly Instructions Chapter 4

4-6 kW UHF Translator Chapter 4, Circuit Descriptions
837B, Rev. 0 4-28
MHz signal is connected to a four-
section, low-pass filter circuit, which is
adjusted by C2, L1, C5, L2, C8, L3, L4,
C11, L5, C15, L6, and C19, and has a
sharp roll-off that eliminates the 4.5-
MHz signal. The filter is set up at the
factory for the desired video-only
output and should not be adjusted by
the customer. The video low-pass
signal is amplified by U2B and applied
to the video low-pass output jack of the
board at J5, which is connected to the
sync tip clamp/modulator board. C21,
with jumper W1 on J9, can be adjusted
to set up the frequency response of the
video. The video-only signal is
amplified by U2A and connected to
three group delay circuits, which are
adjusted by L8 and R18, L9 and R22,
and L10 and R27. These circuits correct
for frequency-response problems
created by the filtering process.
A 4.5-MHz intercarrier signal from the
4.5-MHz bandpass filter board connects
to J3, the intercarrier input jack. The
intercarrier signal is amplified by U1B,
whose gain is set by R38, and
connected out of the board at J4. The
4.5-MHz signal connects to J28 on the
sync tip clamp/modulator board.
The ±12 VDC needed by the board is
supplied by an external power supply in
the tray. The +12 VDC enters the
board at J8, pin 3, and is filtered and
isolated from the rest of the tray by
L12 and C36 before being applied to
the rest of the board. The -12 VDC
enters the board at J8, pin 5, and is
filtered and isolated from the rest of
the tray by L32 and C37 before being
applied to the rest of the board.
4.2.12 (A25) (Optional) 4.5-MHz
Bandpass Filter Board (1265-1307;
Appendix D)
The 4.5-MHz bandpass filter board
passes the 4.5-MHz aural subcarrier
frequency and filters out any out-of-
band products that may be present.
The board consists of two circuits: a
bandpass filter circuit and an envelope
delay equalizer circuit. The filter circuit
has a bandpass characteristic that is
relatively flat around the aural
subcarrier frequency of 4.5 MHz ±100
kHz. It also has zeros (or notches) at
frequencies near 4 and 5 MHz that
prevent asymmetrical envelope delay
error in the pass-band. There is some
symmetrical delay error introduced, but
this is corrected by the envelope delay
equalizer circuit portion of the board.
This circuit places a hump for correction
in the center of the band at 4.5 MHz.
The composite input to the board is
through J1 at an impedance of 75Ω.
The filter circuit consists of the
capacitors C1 to C11 and inductors L1
to L5. The variable components L2, C3,
L4, and C7 are tuned for a peak in the
response around 4.5 MHz; this forms a
relatively flat-frequency response of 4.5
MHz ±100 kHz. The filtered output is
amplified by U1A before it is connected
to the envelope delay equalizer circuit.
The equalizer portion of the board
consists of capacitors C14 to C19 and
inductors L6 and L7. The tuning of the
equalizer is accomplished by removing
jumper W1 on J5 and adjusting L6 for a
notch in the frequency response at the
desired maximum envelope delay
frequency. Replace jumper W1 on J5,
the Operate position, and tune C19 for
a flat response around 4.5 MHz. The L-
pass network creates a flat response
around 4.5 MHz and also generates a
hump in the envelope delay response
to cancel the effects caused by the filter
half of the board that proceeds it.
The filtered and equalized output is
amplified by U1B and connected to J2,
the output jack of the board.
The DC voltages needed to operate the
board enter at jack J4. The +12 VDC
connects to the board at J4-3 and is
filtered and isolated by L8 and C20
before it is connected to the rest of the