User's Manual

Digital ATSC Exciter-Modulator System Chapter 3, Upconverter/Downconverter
Tray or Module Assemblies
Axcera Axciter, Rev. 0 43
and is controlled by an Automatic Gain Control circuit, which maintains a
constant power out of the upconverter, and also the transmitter, that
connects to the power amplifier module.
The Axciter upconverter/downconverter tray or modules have no need for
periodic alignment. This section describes the boards that make up the
upconverter and downconverter in each system. The Axciter and its
associated upconverter require some signals to be interchanged between
them such as IF in and IF out. Please refer to the interconnect drawing of
the particular transmitter to determine how these connections are made.
Upconverter/Downconverter Board Descriptions
Final Conversion Board, Axciter (1307263)
This board converts a signal at an input frequency of 1044 MHz to a
broadcast VHF or UHF TV channel.
The IF at 1044MHz is applied to the board at J7, and is converted down to
VHF or UHF by the mixer IC U6. The LO frequency is applied to the board
at a level of +20 dBm at J8. The output of the mixer is applied to a 6 dB
attenuator and then to a 900 MHz Low Pass filter. The filter is intended to
remove any unwanted conversion products. The signal is next connected
to the amplifier U2, and then a pin diode attenuator consisting of DS4,
DS5 and their associated components. The attenuator sets the output
level of the board and is controlled by an external AGC circuit.
The output of the pin attenuator is applied to another amplifier U3 and
another low pass filter, before reaching the final amplifier U1. The output
of the board is at J5 with a sample of the output available at J6, which is
20 dB in level below the signal at J5. A sample of the output is also
applied to an average power detector for remote metering.
L-Band PLL Board, Axciter (1307206)
This board generates an LO at a frequency of 1.1-1.9 GHz. The board
contains a PLL IC U6, which controls the output frequency of a VCO. The
PLL IC divides the output of the VCO down to 1.0 MHz, and compares it to
a 1.0 MHz reference created by dividing down an external 10 MHz
reference that is applied to the board at J1 pin 4. The IC generates an
error current that is applied to U3 and its associated components to
generate a bias voltage for the VCO's AFC input.
There are two VCOs on the board, U4, which operates at 1.1-1.3 GHz for
VHF channels, and U5, which operates at 1.5-1.9 GHz for UHF channels.
The VCO in use is selected by a signal applied to J1 pin 20. This input
enables the power supply either U1 or U2 for the appropriate VCO for the
desired channel. U7 is a power supply IC that generates +5V for the PLL
IC U6.
The output of each VCO is filtered by a low pass filter to remove any
harmonic content and applied to a pin diode switch consisting of CR1,