Manual Chapter 3

500-Watt VHF Low Band Transmitter Chapter 3, Circuit Descriptions
325A, Rev. 0 3-10
3.1.5.7 Linearity Corrector Circuits
The linearity corrector circuits use three
stages of correction to correct for any
amplitude non-linearities of the IF signal.
Each stage has a variable threshold
control adjustment, R34, R37, or R40,
and a variable magnitude control
adjustment, R13, R18, or R23. The
threshold control determines the point at
which the gain is changed and the
magnitude control determines the
amount of gain change that occurs once
the breakpoint is reached. Two reference
voltages are needed for the operation of
the corrector circuits. Zener diode VR1,
with R33 and R135, provides a +6.8 VDC
reference and the diodes CR11 and CR12
provide a .9 VDC reference that
temperature compensates for the two
diodes in each corrector stage.
For the linearity correctors to operate, an
IF signal is applied to transformer T1,
which doubles the voltage swing by
means of a 1:4 impedance
transformation. Resistors R14, R15, and
R16 form an L-pad that lowers the level
of the signal. The amount that the level
is lowered is adjusted by adding more or
less resistance, using R13, in parallel
with the L-pad resistors. R13 is only in
parallel when the signal reaches a level
large enough to turn on the diodes CR4
and CR5. When the diodes turn on,
current flows through R13, putting it in
parallel with the L-pad.
When R13 is put in parallel with the
resistors, the attenuation through the
L-pad is lowered, causing signal stretch
(the amount determined by the
adjustment of R13). The signal is next
applied to amplifier U2 to compensate for
the loss through the L-pad. The
breakpoint, or cut-in point, for the first
corrector is set by controlling where CR4
and CR5 turn on. This is accomplished by
adjusting cut-in resistor R34; R34 forms
a voltage-divider network from +6.8 VDC
to ground. The voltage at the wiper arm
of R34 is buffered by unity-gain amplifier
U5D. This reference voltage is then
applied to R35, R36, and C39 through
L12 to the CR4 diode. C39 keeps the
reference from sagging during the
vertical interval. The .9 VDC reference
created by CR11 and CR12 is applied to
unity-gain amplifier U5B. The reference
voltage is then connected to diode CR5
through choke L11. The two chokes L11
and L12 form a high impedance for RF
that serves to isolate the op-amp ICs
from the IF.
After the signal is amplified by U2, it is
applied to the second corrector stage
through T2. This corrector and the third
corrector operate in the same fashion as
the first. All three corrector stages are
independent and do not interact with
each other.
The correctors can be disabled by moving
jumper W1 on J4 to the Disable position,
between pins 2 and 3; this moves all of
the breakpoints past the tip of sync so
that they will have no affect. The IF
signal exits the board at IF output jack J3
after passing through the three corrector
stages and is normally connected to an
external IF phase corrector board.
3.1.5.8 Main IF Signal Path (Part 3 of 3)
After the IF signal passes through the
external IF phase corrector board, it
returns to the ALC board at IF input jack
J7. The IF then passes through a
bandpass filter consisting of L20, C97,
C62, L21, C63, L22, L23, C64, and C99.
This bandpass filter is identical in both
form and function to the one described in
Section 3.3 of this chapter. In this case,
the filter is intended to make up for small
errors in frequency response that are
incurred by the signal while being
processed through the linearity and
incidental phase correction circuits.
Following the bandpass filter, the signal
is split using L24, L25, and R89. The
signal passing through L24 is the main IF
path through the board. A sample of the
corrected IF signal is split off and
connected to J10, the IF sample jack.