Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in LTE connected mode
- 1.5.1.3 VCC current consumption in 2G connected mode
- 1.5.1.4 VCC current consumption in ultra low power deep sleep mode
- 1.5.1.5 VCC current consumption in low power idle mode
- 1.5.1.6 VCC current consumption in active mode (PSM / low power disabled)
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General Purpose Input/Output
- 1.12 GNSS peripheral input output
- 1.13 Reserved pins (RSVD)
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using LDO linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Guidelines for external battery charging circuit
- 2.2.1.7 Guidelines for external charging and power path management circuit
- 2.2.1.8 Guidelines for particular VCC supply circuit design for SARA-R4x2
- 2.2.1.9 Guidelines for removing VCC supply
- 2.2.1.10 Additional guidelines for VCC supply circuit design
- 2.2.1.11 Guidelines for VCC supply layout design
- 2.2.1.12 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interfaces
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.7 Audio
- 2.8 General Purpose Input/Output
- 2.9 GNSS peripheral input output
- 2.10 Reserved pins (RSVD)
- 2.11 Module placement
- 2.12 Module footprint and paste mask
- 2.13 Thermal guidelines
- 2.14 Schematic for SARA-R4 series module integration
- 2.15 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 4.1 Product certification approval overview
- 4.2 US Federal Communications Commission notice
- 4.3 Innovation, Science, Economic Development Canada notice
- 4.4 European Conformance CE mark
- 4.5 National Communication Commission Taiwan
- 4.6 ANATEL Brazil
- 4.7 Australian Conformance
- 4.8 GITEKI Japan
- 4.9 KC South Korea
- 5 Product testing
- Appendix
- A Migration between SARA modules
- B Glossary
- Related documentation
- Revision history
- Contact
SARA-R4 series - System integration manual
UBX-16029218 - R20 Design-in Page 94 of 129
C1-Public
Connection with u-blox 3.0 V GNSS receivers
☞ Dedicated AT commands for external u-blox GNSS receiver communication and control are not
supported by SARA-R422 and SARA-R422M8S product versions.
Figure 64 shows an application circuit for connecting the cellular module to an external u-blox 3.0 V
GNSS receiver:
• As the SDA and SCL pins of the cellular module are not tolerant up to 3.0 V, the connection to the
related I2C pins of the u-blox 3.0 V GNSS receiver must be provided using a suitable I2C-bus
Bidirectional Voltage Translator (e.g. TI TCA9406, which additionally provides the partial power
down feature so that the GNSS 3.0 V supply can be ramped up before the V_INT 1.8 V cellular
supply). External pull-up resistors are not needed on the cellular module side, as they are already
integrated in the cellular module.
• The GPIO2 is connected to the active-high enable pin of the voltage regulator that supplies the u-
blox 3.0 V GNSS receiver providing the “GNSS supply enable” function. A pull-down resistor is
provided to avoid a switch on of the positioning receiver when the cellular module is switched off
or in the reset state.
• The GPIO3 pin is connected to the TXD1 pin of the u-blox 3.0 V GNSS receiver providing the
additional “GNSS Tx data ready” function, using a suitable Unidirectional General Purpose Voltage
Translator (e.g. TI SN74AVC2T245, which additionally provides the partial power down feature so
that the 3.0 V GNSS supply can be also ramped up before the V_INT 1.8 V cellular supply.
u-blox GNSS
3.0 V receiver
24
GPIO3
1V8
B1 A1
GND
U3
B2A2
VCCBVCCA
Unidirectional
Voltage Translator
C4
C5
3V0
TxD
R1
INOUT
LDO Regulator
SHDNn
R2
VMAIN3V0
U1
23
GPIO2
26
SDA
27
SCL
1V8
SDA_A SDA_B
GND
U2
SCL_ASCL_B
VCCA
VCCB
I2C-bus Bidirectional
Voltage Translator
4
V_INT
C1
C2 C3
R3
SDA
SCL
VCC
DIR1
DIR2 OEn
OE
GNSS data ready
GNSS supply enabled
GND
SARA-R410M
SARA-R412M
SARA-R422S
Figure 64: Application circuit for connecting SARA-R4 series modules to u-blox 3.0 V GNSS receivers
Reference
Description
Part Number - Manufacturer
R1, R2
4.7 kΩ Resistor 0402 5% 0.1 W
RC0402JR-074K7L - Yageo Phycomp
R3
47 kΩ Resistor 0402 5% 0.1 W
RC0402JR-0747KL - Yageo Phycomp
C2, C3, C4, C5
100 nF Capacitor Ceramic X5R 0402 10% 10V
GRM155R71C104KA01 - Murata
U1, C1
Voltage Regulator for GNSS receiver and
related output bypass capacitor
See GNSS receiver Hardware Integration Manual
U2
I2C-bus Bidirectional Voltage Translator
TCA9406DCUR - Texas Instruments
U3
Generic Unidirectional Voltage Translator
SN74AVC2T245 - Texas Instruments
Table 45: Components for connecting SARA-R4 series modules to u-blox 3.0 V GNSS receivers
☞ For additional guidelines regarding the design of applications with u-blox 1.8 V GNSS receivers,
see the Hardware Integration Manual of the u-blox GNSS receivers.
☞ For additional guidelines regarding Celluar and GNSS RF coexistence, see section 2.4.4