Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in LTE connected mode
- 1.5.1.3 VCC current consumption in 2G connected mode
- 1.5.1.4 VCC current consumption in ultra low power deep sleep mode
- 1.5.1.5 VCC current consumption in low power idle mode
- 1.5.1.6 VCC current consumption in active mode (PSM / low power disabled)
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General Purpose Input/Output
- 1.12 GNSS peripheral input output
- 1.13 Reserved pins (RSVD)
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using LDO linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Guidelines for external battery charging circuit
- 2.2.1.7 Guidelines for external charging and power path management circuit
- 2.2.1.8 Guidelines for particular VCC supply circuit design for SARA-R4x2
- 2.2.1.9 Guidelines for removing VCC supply
- 2.2.1.10 Additional guidelines for VCC supply circuit design
- 2.2.1.11 Guidelines for VCC supply layout design
- 2.2.1.12 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interfaces
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.7 Audio
- 2.8 General Purpose Input/Output
- 2.9 GNSS peripheral input output
- 2.10 Reserved pins (RSVD)
- 2.11 Module placement
- 2.12 Module footprint and paste mask
- 2.13 Thermal guidelines
- 2.14 Schematic for SARA-R4 series module integration
- 2.15 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 4.1 Product certification approval overview
- 4.2 US Federal Communications Commission notice
- 4.3 Innovation, Science, Economic Development Canada notice
- 4.4 European Conformance CE mark
- 4.5 National Communication Commission Taiwan
- 4.6 ANATEL Brazil
- 4.7 Australian Conformance
- 4.8 GITEKI Japan
- 4.9 KC South Korea
- 5 Product testing
- Appendix
- A Migration between SARA modules
- B Glossary
- Related documentation
- Revision history
- Contact
SARA-R4 series - System integration manual
UBX-16029218 - R20 Design-in Page 90 of 129
C1-Public
The SARA-R422-00B, SARA-R422S-00B and SARA-R422M8S-00B modules product versions do not
support AT command / data communication over USB interface: the USB interface is available on
these modules product versions for FW upgrade by means of the dedicated u-blox EasyFlash tool and
for diagnostic purposes only. Therefore, the USB interface of these modules product versions is not
designed to be connected to an external host processor mounted on the application board.
☞ It is highly recommended to provide access to V_INT, PWR_CTRL, USB_5V0, USB_3V3, USB_D+,
USB_D-, and RSVD #33 pins of the SARA-R422, SARA-R422S, and SARA-R422M8S modules for
FW upgrade and/or for diagnostic purpose, making available:
(a) accessible test points, directly connected to the related pins of the module, as illustrated in
the application circuit example (a) of Figure 60, or
(b) the specific SAMTEC FTSH-103-01-L-DV male header connector, directly connected to the
related pins of the module, as illustrated in the application circuit example (b) of Figure 60, or
(c) a generic USB device connector, connected to the related pins of the module through the
specific circuit illustrated in the application circuit example (c) of Figure 60 and Table 43.
29
USB_D+
28
USB_D-
GND
SARA-R422 /-R422S /-R422M8S
2
USB_3V3
17
USB_5V0
33
RSVD
Test-Point
4
V_INT
D+
D-
GND
USB DEVICE
CONNECTOR
VBUS
D1 D2 D3
VIN VOUT
LDO Regulator
Enable
U1
C2
R1
GND
C1
U2
29
USB_D+
28
USB_D-
GND
SARA-R422 /-R422S /-R422M8S
2
USB_3V3
Test-Point
Test-Point
Test-Point
17
USB_5V0
Test-Point
33
RSVD
Test-Point
4
V_INT
Test-Point
29
USB_D+
28
USB_D-
GND
SARA-R422 /-R422S /-R422M8S
2
USB_3V3
17
USB_5V0
33
RSVD
Test-Point
4
V_INT
GND
USB_D-
USB_5V0
USB_3V3
USB_D+
V_INT
SAMTEC
FTSH-103-01-L-DV
Male Header Connector
Top View
(a)
(b)
(c)
Figure 60: USB Interface application circuits for SARA-R422, SARA-R422S and SARA-R422M8S modules
Reference
Description
Part Number - Manufacturer
C1, C2
1 µF Capacitor Ceramic X7R 16 V
Generic manufacturer
D1, D2, D3
Very Low Capacitance ESD Protection
PESD0402-140 - Littelfuse
R1
10 k Resistor 0402 5% 0.1 W
Various manufacturers
U1
LDO Linear Regulator 3.3 V 150 mA
NCP600SN330T1G - ON Semiconductor
U2
NPN/PNP 10k/47k Biased Silicon TransistorBCR35PN -
Infineon Technologies