Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in LTE connected mode
- 1.5.1.3 VCC current consumption in 2G connected mode
- 1.5.1.4 VCC current consumption in ultra low power deep sleep mode
- 1.5.1.5 VCC current consumption in low power idle mode
- 1.5.1.6 VCC current consumption in active mode (PSM / low power disabled)
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General Purpose Input/Output
- 1.12 GNSS peripheral input output
- 1.13 Reserved pins (RSVD)
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using LDO linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Guidelines for external battery charging circuit
- 2.2.1.7 Guidelines for external charging and power path management circuit
- 2.2.1.8 Guidelines for particular VCC supply circuit design for SARA-R4x2
- 2.2.1.9 Guidelines for removing VCC supply
- 2.2.1.10 Additional guidelines for VCC supply circuit design
- 2.2.1.11 Guidelines for VCC supply layout design
- 2.2.1.12 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interfaces
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.7 Audio
- 2.8 General Purpose Input/Output
- 2.9 GNSS peripheral input output
- 2.10 Reserved pins (RSVD)
- 2.11 Module placement
- 2.12 Module footprint and paste mask
- 2.13 Thermal guidelines
- 2.14 Schematic for SARA-R4 series module integration
- 2.15 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 4.1 Product certification approval overview
- 4.2 US Federal Communications Commission notice
- 4.3 Innovation, Science, Economic Development Canada notice
- 4.4 European Conformance CE mark
- 4.5 National Communication Commission Taiwan
- 4.6 ANATEL Brazil
- 4.7 Australian Conformance
- 4.8 GITEKI Japan
- 4.9 KC South Korea
- 5 Product testing
- Appendix
- A Migration between SARA modules
- B Glossary
- Related documentation
- Revision history
- Contact
SARA-R4 series - System integration manual
UBX-16029218 - R20 Design-in Page 62 of 129
C1-Public
2.4 Antenna interfaces
SARA-R4 series modules provide an RF interface for connecting the external antenna: the ANT pin
represents the RF input/output for RF signals transmission and reception.
SARA-R422M8S modules provide also a GNSS RF interface for connecting the external GNSS
antenna: the ANT_GNSS pin represents the GNSS RF input for GNSS signals reception.
The ANT and ANT_GNSS pins have a nominal characteristic impedance of 50 and must be
connected to the related external antenna system through a 50 transmission line to allow clean
transmission / reception of RF signals.
2.4.1 General guidelines for antenna interfaces
2.4.1.1 Guidelines for ANT and ANT_GNSS pins RF connection design
☞ The GNSS antenna RF interface is supported by SARA-R422M8S modules only.
A clean transition between the ANT and ANT_GNSS pads and the application board PCB must be
provided, implementing the following design-in guidelines for the layout of the application PCB close
to the ANT and ANT_GNSS pads:
• On a multilayer board, the whole layer stack below the RF connections should be free of digital lines
• Increase GND keep-out (i.e. clearance, a void area) around the ANT and ANT_GNSS pads, on the
top layer of the application PCB, to at least 250 m up to adjacent pads metal definition and up to
400 m on the area below the module, to reduce parasitic capacitance to ground, as described in
the left picture in Figure 35
• Add GND keep-out (i.e. clearance, a void area) on the buried metal layer below the ANT and
ANT_GNSS pads if the top-layer to buried layer dielectric thickness is below 200 m, to reduce
parasitic capacitance to ground, as described in the right picture in Figure 35
Min.
250 µm
Min. 400 µm
GND
RF pad
GND clearance
on buried layer very close to top layer
below RF pad
GND clearance
on top layer
around RF pad
Figure 35: GND keep-out area on top layer around RF pad and on very close buried layer below RF pad (ANT / ANT_GNSS)