Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in LTE connected mode
- 1.5.1.3 VCC current consumption in 2G connected mode
- 1.5.1.4 VCC current consumption in ultra low power deep sleep mode
- 1.5.1.5 VCC current consumption in low power idle mode
- 1.5.1.6 VCC current consumption in active mode (PSM / low power disabled)
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General Purpose Input/Output
- 1.12 GNSS peripheral input output
- 1.13 Reserved pins (RSVD)
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using LDO linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Guidelines for external battery charging circuit
- 2.2.1.7 Guidelines for external charging and power path management circuit
- 2.2.1.8 Guidelines for particular VCC supply circuit design for SARA-R4x2
- 2.2.1.9 Guidelines for removing VCC supply
- 2.2.1.10 Additional guidelines for VCC supply circuit design
- 2.2.1.11 Guidelines for VCC supply layout design
- 2.2.1.12 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interfaces
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.7 Audio
- 2.8 General Purpose Input/Output
- 2.9 GNSS peripheral input output
- 2.10 Reserved pins (RSVD)
- 2.11 Module placement
- 2.12 Module footprint and paste mask
- 2.13 Thermal guidelines
- 2.14 Schematic for SARA-R4 series module integration
- 2.15 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 4.1 Product certification approval overview
- 4.2 US Federal Communications Commission notice
- 4.3 Innovation, Science, Economic Development Canada notice
- 4.4 European Conformance CE mark
- 4.5 National Communication Commission Taiwan
- 4.6 ANATEL Brazil
- 4.7 Australian Conformance
- 4.8 GITEKI Japan
- 4.9 KC South Korea
- 5 Product testing
- Appendix
- A Migration between SARA modules
- B Glossary
- Related documentation
- Revision history
- Contact
SARA-R4 series - System integration manual
UBX-16029218 - R20 System description Page 31 of 129
C1-Public
Figure 15 and Figure 16 describe the SARA-R4 series modules switch-off sequence started by means
of the AT+CPWROFF command and by means of the PWR_ON / PWR_CTRL input pin respectively,
allowing storage of current parameter settings in the module’s non-volatile memory and a clean
network detach, with the following phases:
• When the +CPWROFF AT command is sent, or when a low pulse with appropriate time duration
(see the SARA-R4 series data sheet [1]) is applied at the PWR_ON / PWR_CTRL input pin, the
module starts the switch-off routine.
• Then, if the +CPWROFF AT command has been sent, the module replies OK on the AT interface:
the switch-off routine is in progress.
• At the end of the switch-off routine, all the digital pins are tri-stated and all the internal voltage
regulators are turned off, including the generic digital interfaces supply (V_INT).
• Then, the module remains in switch-off mode as long as a switch on event does not occur (e.g.
applying a low level to PWR_ON / PWR_CTRL input pin), and it enters not-powered mode if the
VCC supply is removed.
VCC
PWR_ON / PWR_CTRL
RESET_N
V_INT
Internal Reset
System State
BB Pads State Operational
OFF
Tristate / Floating
ON
Operational → Tristate
AT+CPWROFF
sent to the module
OK
replied by the module
VCC can be
removed
Figure 15: SARA-R4 series modules switch-off sequence by means of AT+CPWROFF command
VCC
PWR_ON / PWR_CTRL
RESET_N
V_INT
Internal Reset
System State
BB Pads State
OFF
Tristate / Floating
ON
Operational -> Tristate
Operational
The module starts the
switch-off routine
VCC can be
removed
Figure 16: SARA-R4 series modules switch-off sequence by means of PWR_ON / PWR_CTRL pin
☞ The Internal Reset signal is not available on a module pin, but it is highly recommended to monitor
the V_INT pin to sense the end of the switch-off sequence.
⚠ VCC supply can be removed only after V_INT goes low: an abrupt removal of the VCC supply during
SARA-R4 series modules normal operations may lead to an unrecoverable faulty state!
☞ The duration of each phase in the SARA-R4 series modules’ switch-off routines can largely vary
depending on the application / network settings and the concurrent module activities.