Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in LTE connected mode
- 1.5.1.3 VCC current consumption in 2G connected mode
- 1.5.1.4 VCC current consumption in ultra low power deep sleep mode
- 1.5.1.5 VCC current consumption in low power idle mode
- 1.5.1.6 VCC current consumption in active mode (PSM / low power disabled)
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General Purpose Input/Output
- 1.12 GNSS peripheral input output
- 1.13 Reserved pins (RSVD)
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using LDO linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Guidelines for external battery charging circuit
- 2.2.1.7 Guidelines for external charging and power path management circuit
- 2.2.1.8 Guidelines for particular VCC supply circuit design for SARA-R4x2
- 2.2.1.9 Guidelines for removing VCC supply
- 2.2.1.10 Additional guidelines for VCC supply circuit design
- 2.2.1.11 Guidelines for VCC supply layout design
- 2.2.1.12 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interfaces
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.7 Audio
- 2.8 General Purpose Input/Output
- 2.9 GNSS peripheral input output
- 2.10 Reserved pins (RSVD)
- 2.11 Module placement
- 2.12 Module footprint and paste mask
- 2.13 Thermal guidelines
- 2.14 Schematic for SARA-R4 series module integration
- 2.15 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 4.1 Product certification approval overview
- 4.2 US Federal Communications Commission notice
- 4.3 Innovation, Science, Economic Development Canada notice
- 4.4 European Conformance CE mark
- 4.5 National Communication Commission Taiwan
- 4.6 ANATEL Brazil
- 4.7 Australian Conformance
- 4.8 GITEKI Japan
- 4.9 KC South Korea
- 5 Product testing
- Appendix
- A Migration between SARA modules
- B Glossary
- Related documentation
- Revision history
- Contact
SARA-R4 series - System integration manual
UBX-16029218 - R20 System description Page 27 of 129
C1-Public
1.5.1.5 VCC current consumption in low power idle mode
The low power idle mode configuration is by default disabled, but it can be enabled using the +UPSV
AT command (see the SARA-R4 series AT commands manual [2]).
When low power idle mode is enabled, the module automatically enters the low power mode whenever
possible, but it must periodically monitor the paging channel of the current base station (paging block
reception), in accordance to the 2G / LTE system requirements, even if connected mode is not enabled
by the application. When the module monitors the paging channel, it wakes up to the active mode to
enable the reception of the paging block. In between, the module switches to low power mode. This is
known as discontinuous reception (DRX) or extended discontinuous reception (eDRX).
Figure 12 illustrates an example of the module current consumption profile when low power mode
configuration is enabled: the module is registered with the network, automatically enters the low
power idle mode, and periodically wakes up to active mode to monitor the paging channel for the
paging block reception in discontinuous reception (DRX) mode.
Detailed current consumption values can be found in the SARA-R4 series data sheet [1].
IDLE MODE ACTIVE MODE IDLE MODE
Active Mode
Enabled
Idle Mode
Enabled
Time [s]
Current [mA]
Time [ms]
Current [mA]
RX
Enabled
0
100
0
100
Paging period
Figure 12: Example of VCC current consumption profile with low power mode enabled (AT+UPSV≠0), module registered with
the network: the module is in low-power idle mode, with no concurrent activities executed, and it periodically wakes up to
active mode for paging block reception
1.5.1.6 VCC current consumption in active mode (PSM / low power disabled)
The active mode is the state where the module is switched on and ready to communicate with an
external device by means of the application interfaces (as the USB or the UART serial interface). The
module processor core is active, and the 19.2 MHz reference clock frequency is used.
If power saving mode and/or low power mode configurations are disabled, as it is by default (see the
SARA-R4 series AT commands manual [2], +CPSMS, +UCPSMS, +UPSMVER, +UPSV AT commands
for details), the module remains in active mode. Otherwise, if PSM mode and/or low power mode
configurations are enabled, the module enters PSM mode and/or low power mode whenever possible.