Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in LTE connected mode
- 1.5.1.3 VCC current consumption in 2G connected mode
- 1.5.1.4 VCC current consumption in ultra low power deep sleep mode
- 1.5.1.5 VCC current consumption in low power idle mode
- 1.5.1.6 VCC current consumption in active mode (PSM / low power disabled)
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General Purpose Input/Output
- 1.12 GNSS peripheral input output
- 1.13 Reserved pins (RSVD)
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using LDO linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Guidelines for external battery charging circuit
- 2.2.1.7 Guidelines for external charging and power path management circuit
- 2.2.1.8 Guidelines for particular VCC supply circuit design for SARA-R4x2
- 2.2.1.9 Guidelines for removing VCC supply
- 2.2.1.10 Additional guidelines for VCC supply circuit design
- 2.2.1.11 Guidelines for VCC supply layout design
- 2.2.1.12 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interfaces
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.7 Audio
- 2.8 General Purpose Input/Output
- 2.9 GNSS peripheral input output
- 2.10 Reserved pins (RSVD)
- 2.11 Module placement
- 2.12 Module footprint and paste mask
- 2.13 Thermal guidelines
- 2.14 Schematic for SARA-R4 series module integration
- 2.15 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 4.1 Product certification approval overview
- 4.2 US Federal Communications Commission notice
- 4.3 Innovation, Science, Economic Development Canada notice
- 4.4 European Conformance CE mark
- 4.5 National Communication Commission Taiwan
- 4.6 ANATEL Brazil
- 4.7 Australian Conformance
- 4.8 GITEKI Japan
- 4.9 KC South Korea
- 5 Product testing
- Appendix
- A Migration between SARA modules
- B Glossary
- Related documentation
- Revision history
- Contact
SARA-R4 series - System integration manual
UBX-16029218 - R20 System description Page 19 of 129
C1-Public
1.4 Operating modes
SARA-R4 series modules have several operating modes. The operating modes are defined in Table 4
and described in detail in Table 5, providing general guidelines for operation.
General status
Operating mode
Definition
Power-down
Not-powered mode
VCC supply not present or below operating range: module is switched off.
Power-off mode
VCC supply within operating range and module is switched off.
Normal Operation
Deep-sleep mode
Only the RTC runs, with 32 kHz reference internally generated.
Idle mode
Module processor runs with 32 kHz reference generated by the internal oscillator.
Active mode
Module processor runs with 19.2 MHz reference generated by the internal oscillator.
Connected mode
RF Tx/Rx data connection enabled and processor core runs with 19.2 MHz reference.
Table 4: SARA-R4 series modules operating modes definition
Mode
Description
Transition between operating modes
Not-Powered
Module is switched off.
Application interfaces are not accessible.
When VCC supply is removed, the modules enter not-powered
mode.
When in not-powered mode, the module can enter power-off
mode applying VCC supply (see 1.6.1).
Power-Off
Module is switched off: normal shutdown by
an appropriate power-off event (see 1.6.2).
Application interfaces are not accessible.
The modules enter power-off mode from active mode when the
host processor implements a clean switch-off procedure, by
sending the +CPWROFF AT command or by using the PWR_ON /
PWR_CTRL pin (see 1.6.2).
When in power-off mode, the modules can be switched on by the
host processor using the PWR_ON / PWR_CTRL input pin (see
1.6.1).
When in power-off mode, the modules enter not-powered mode
by removing VCC supply.
Deep-Sleep
Module is in RTC-only mode: only the
internal 32 kHz Real Time Clock is active.
The RF section and the application
interfaces are temporarily disabled and
switched off: the module is temporarily not
ready to communicate with an external
device by means of the application
interfaces as configured to reduce the
current consumption to the minimum
possible (see section 1.5.1.4).
The modules automatically switch from the active mode to the
ultra low power deep sleep mode whenever possible,
upon expiration of the T3324 active timer set by the network
(entering the Power Saving Mode defined in 3GPP Rel.13,
depending on the configuration set by +CPSMS AT command),
upon expiration of the 6 s AT inactivity timer (depending on the
configuration set by the +UPSV AT command),
in-between eDRX cycles when not listening to paging (depending
on the configuration set by the +UPSMVER AT command),
if no concurrent GNSS activities are executed (considering the
SARA-R422M8S and SARA-R422S modules).
When the module is in the ultra low power deep sleep mode,
it automatically switches on to the active mode upon expiration
of the T3412 periodic TAU timer set by the network according to
the Power Saving Mode defined in 3GPP Rel.13,
it automatically switches on in-between eDRX cycles when
listening to paging according to the timing set by the network,
or it can be switched on to the active mode by the host
processor using the PWR_ON / PWR_CTRL input pin (see 1.6.1).
For further details, see u-blox application development guide [3]
and the u-blox AT commands manual [2].