Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in LTE connected mode
- 1.5.1.3 VCC current consumption in 2G connected mode
- 1.5.1.4 VCC current consumption in ultra low power deep sleep mode
- 1.5.1.5 VCC current consumption in low power idle mode
- 1.5.1.6 VCC current consumption in active mode (PSM / low power disabled)
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General Purpose Input/Output
- 1.12 GNSS peripheral input output
- 1.13 Reserved pins (RSVD)
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using LDO linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Guidelines for external battery charging circuit
- 2.2.1.7 Guidelines for external charging and power path management circuit
- 2.2.1.8 Guidelines for particular VCC supply circuit design for SARA-R4x2
- 2.2.1.9 Guidelines for removing VCC supply
- 2.2.1.10 Additional guidelines for VCC supply circuit design
- 2.2.1.11 Guidelines for VCC supply layout design
- 2.2.1.12 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interfaces
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.7 Audio
- 2.8 General Purpose Input/Output
- 2.9 GNSS peripheral input output
- 2.10 Reserved pins (RSVD)
- 2.11 Module placement
- 2.12 Module footprint and paste mask
- 2.13 Thermal guidelines
- 2.14 Schematic for SARA-R4 series module integration
- 2.15 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 4.1 Product certification approval overview
- 4.2 US Federal Communications Commission notice
- 4.3 Innovation, Science, Economic Development Canada notice
- 4.4 European Conformance CE mark
- 4.5 National Communication Commission Taiwan
- 4.6 ANATEL Brazil
- 4.7 Australian Conformance
- 4.8 GITEKI Japan
- 4.9 KC South Korea
- 5 Product testing
- Appendix
- A Migration between SARA modules
- B Glossary
- Related documentation
- Revision history
- Contact
SARA-R4 series - System integration manual
UBX-16029218 - R20 System description Page 16 of 129
C1-Public
Function
Pin Name
Pin No
I/O
Description
Remarks
USB
VUSB_DET
15
17
I
USB detect input
VBUS (5 V typ.) sense input pin to enable the USB interface.
Test-Point for diagnostic / FW update strongly recommended.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
USB_5V0
16
17
I
USB detect input
VBUS (5 V typ.) sense input pin to enable the USB interface.
Test-Point for diagnostic / FW update strongly recommended.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
USB_3V3
16
2
I
USB 3V3 input
3.3 V (typical) supply input pin to supply the USB interface.
Test-Point for diagnostic / FW update strongly recommended.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
USB_D-
28
I/O
USB Data Line D-
USB interface for AT commands, data communication, FOAT,
FW update by u-blox tool, diagnostics.
90 nominal differential impedance (Z
0
)
30 nominal common mode impedance (Z
CM
)
Pull-up or pull-down resistors and external series resistors as
required by the USB 2.0 specifications [5] are part of the USB
pin driver and need not be provided externally.
Test-Point for diagnostic / FW update strongly recommended.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
USB_D+
29
I/O
USB Data Line D+
USB interface for AT commands, data communication, FOAT,
FW update by u-blox tool, diagnostics.
90 nominal differential impedance (Z
0
)
30 nominal common mode impedance (Z
CM
)
Pull-up or pull-down resistors and external series resistors as
required by the USB 2.0 specifications [5] are part of the USB
pin driver and need not be provided externally.
Test-Point for diagnostic / FW update strongly recommended.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
RSVD
33
N/A
RESERVED pin
This pin can be connected to GND by 0 series jumper.
Test-Point for diagnostic strongly recommended.
SPI
I2S_WA /
SPI_MOSI
15
34
O
SPI MOSI
SPI data output,
alternatively configurable as 2S word alignment
SPI and I2S are not supported by current product versions.
See section 1.9.3 for functional description.
See section 2.6.3 for external circuit design-in.
I2S_RXD /
SPI_MISO
15
37
I
SPI MISO
SPI data input,
alternatively configurable as 2S receive data
SPI and I2S are not supported by current product versions.
See section 1.9.3 for functional description.
See section 2.6.3 for external circuit design-in.
I2S_CLK /
SPI_CLK
15
36
O
SPI clock
SPI clock, alternatively configurable as I2S clock
SPI and I2S are not supported by current product versions.
See section 1.9.3 for functional description.
See section 2.6.3 for external circuit design-in.
I2S_TXD /
SPI_CS
15
35
O
SPI Chip Select
SPI Chip Select, alternatively settable as I2S transmit data
SPI and I2S are not supported by current product versions.
See section 1.9.3 for functional description.
See section 2.6.3 for external circuit design-in.
15
SARA-R410M, SARA-R412M modules only
16
SARA-R422, SARA-R422S, SARA-R422M8S modules only