Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in LTE connected mode
- 1.5.1.3 VCC current consumption in 2G connected mode
- 1.5.1.4 VCC current consumption in ultra low power deep sleep mode
- 1.5.1.5 VCC current consumption in low power idle mode
- 1.5.1.6 VCC current consumption in active mode (PSM / low power disabled)
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General Purpose Input/Output
- 1.12 GNSS peripheral input output
- 1.13 Reserved pins (RSVD)
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using LDO linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Guidelines for external battery charging circuit
- 2.2.1.7 Guidelines for external charging and power path management circuit
- 2.2.1.8 Guidelines for particular VCC supply circuit design for SARA-R4x2
- 2.2.1.9 Guidelines for removing VCC supply
- 2.2.1.10 Additional guidelines for VCC supply circuit design
- 2.2.1.11 Guidelines for VCC supply layout design
- 2.2.1.12 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interfaces
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.7 Audio
- 2.8 General Purpose Input/Output
- 2.9 GNSS peripheral input output
- 2.10 Reserved pins (RSVD)
- 2.11 Module placement
- 2.12 Module footprint and paste mask
- 2.13 Thermal guidelines
- 2.14 Schematic for SARA-R4 series module integration
- 2.15 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 4.1 Product certification approval overview
- 4.2 US Federal Communications Commission notice
- 4.3 Innovation, Science, Economic Development Canada notice
- 4.4 European Conformance CE mark
- 4.5 National Communication Commission Taiwan
- 4.6 ANATEL Brazil
- 4.7 Australian Conformance
- 4.8 GITEKI Japan
- 4.9 KC South Korea
- 5 Product testing
- Appendix
- A Migration between SARA modules
- B Glossary
- Related documentation
- Revision history
- Contact
SARA-R4 series - System integration manual
UBX-16029218 - R20 Design-in Page 100 of 129
C1-Public
2.14 Schematic for SARA-R4 series module integration
2.14.1 Schematic for SARA-R4 series modules
Figure 68 is an example of a schematic diagram where a SARA-R4 series module is integrated into an
application board using almost all available interfaces and functions.
3V8
GND
100uF 10nF
SARA-R4 series
52 VCC
53 VCC
51 VCC
68pF
18 RESET_N
Application
Processor
Open
drain
output
15 PWR_ON / PWR_CTRL
Open
drain
output
TP
TP
12
TXD
13
RXD
8
DCD
10
RTS
11
CTS
9
DTR
6
DSR
7
RI
TP
TP
TXD
RXD
DCD
RTS
CTS
DTR
DSR
RI
1.8 V DTE
GND GND
USB 2.0 host
D-
D+
28
USB_D-
29
USB_D+
VBUS 17
VUSB_DET / USB_5V0
TP
TP
GND GND
0Ω
0Ω
0Ω
0Ω
47pF
SIM Card
Holder
VCC (C1)
VPP (C6)
IO (C7)
CLK (C3)
RST (C2)
GND (C5)
47pF47pF 100nF
41VSIM
39SIM_IO
38SIM_CLK
40SIM_RST
47pF
SW1
SW2
4V_INT
42GPIO5
470k
ESD ESD ESD ESD ESD ESD
1k
TP
V_INT
62ANT_DET
10k
27pF
ESD
68nH
56
Connector
Cellular
antenna
33pF
ANT
TP
0Ω
39nH
15pF
15pF100nF
24GPIO3
V_INT
B1 A1
GND
B2 A2
VCCB VCCA
SN74AVC2T245
Voltage Translator
100nF
100nF
3V0
TxD1
4.7k
IN
OUT
LDO Regulator
SHDNn
4.7k
3V8 3V0
23GPIO2
V_INT
SDA_A
SDA_B
GND
SCL_A
SCL_B
VCCA
VCCB
TCA9406
I2C Voltage Translator
100nF
100nF
100nF
47k
SDA2
SCL2
VCC
DIR1
DIR2OEn
OE
GND
EXTINT0GPIO4 25
u-blox GNSS
3.0 V receiver
26SDA
27SCL
Not supported by SARA-R410M-01B /-R422 /-R422M8S
19GPIO6
GND
3V8
Network
Indicator
16
GPIO1
36I2S_CLK / SPI_CLK
34I2S_WA / SPI_MOSI
35I2S_TXD / SPI_CS
37I2S_RXD / SPI_MISO
Ferrite
Bead
2
USB_3V3
TP
RSVD
TP
RSVD33
31ANT_GNSS
GNSS
antenna
44ANT_ON
46
EXTINT
47
TXD_GNSS
45
TIMEPULSE
Output
RXD
Input
GND GND
SARA-R422M8S
only
TP
Figure 68: Example of schematic diagram to integrate a SARA-R4 series module using all available interfaces
44
44
Flow control is not supported by SARA-R410M-01B and SARA-R410M-02B-00 product versions. The RTS input must be set low to
communicate over UART on SARA-R410M-01B product version. The DTR input must be set low to have URCs presented over UART on
SARA-R410M-01B and SARA-R41xM-x2B product versions.