Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in LTE connected mode
- 1.5.1.3 VCC consumption in deep-sleep mode (low power mode and PSM enabled)
- 1.5.1.4 VCC current consumption in low power idle mode (low power mode enabled)
- 1.5.1.5 VCC current consumption in active mode (low power mode and PSM disabled)
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General purpose input / output (GPIO)
- 1.12 Reserved pin (RSVD)
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using low drop-out linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Guidelines for external battery charging circuit
- 2.2.1.7 Guidelines for external charging and power path management circuit
- 2.2.1.8 Guidelines for removing VCC supply
- 2.2.1.9 Additional guidelines for VCC supply circuit design
- 2.2.1.10 Guidelines for VCC supply layout design
- 2.2.1.11 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interfaces
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.6.1 UART interfaces
- 2.6.1.1 Guidelines for UART circuit design
- Providing 1 UART with the full RS-232 functionality (using the complete V.24 link)
- Providing 1 UART with the TXD, RXD, RTS, CTS, DTR and RI lines only
- Providing 1 UART with the TXD, RXD, RTS and CTS lines only
- Providing 2 UARTs with the TXD, RXD, RTS and CTS lines only
- Providing 1 UART with the TXD and RXD lines only
- Providing 2 UARTs with the TXD and RXD lines only
- Additional considerations
- 2.6.1.2 Guidelines for UART layout design
- 2.6.1.1 Guidelines for UART circuit design
- 2.6.2 USB interface
- 2.6.3 SPI interfaces
- 2.6.4 SDIO interface
- 2.6.5 DDC (I2C) interface
- 2.6.1 UART interfaces
- 2.7 Audio
- 2.8 General purpose input / output (GPIO)
- 2.9 Reserved pin (RSVD)
- 2.10 Module placement
- 2.11 Module footprint and paste mask
- 2.12 Schematic for SARA-R5 series module integration
- 2.13 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- Appendix
- A Migration between SARA modules
- B Glossary
- Related documents
- Revision history
- Contact
SARA-R5 series - System integration manual
UBX-19041356 - R03 System description Page 9 of 123
Confidential
ANT_GNSS
V_INT (I/O)
VCC (supply)
ANT_DET
ANT
Flash memory
SIM
I2S
GPIOs
Reset
Power-on
UART
USB
DDC (I2C)
PA
UBX-R5
Cellular chipset
Base Band
processor
Power
Management
Unit
RF transceiver
Filter
Filter
Switch
SAW
LNA
UBX-M8
GNSS chipset
SPI
SDIO
Secure element
(eSIM)
32 kHz
26 MHz
TCXO
Figure 3: SARA-R510M8S block diagram
☞ The “00” product version of the SARA-R5 series modules do not support the following interfaces,
which should be left unconnected and should not be driven by external devices:
o SPI interface
o SDIO interface
o Digital audio (I2S) interface
SARA-R5 series modules internally consist of the following sections described herein with more
details than the simplified block diagrams of Figure 1, Figure 2 and Figure 3.
RF section
The RF section is composed of the following main elements:
RF switch connecting the antenna port (ANT) to the suitable RF Tx / Rx paths for LTE Cat M1 / NB2
Half-Duplex operations
Power Amplifiers (PA) amplifying the Tx signal modulated and pre-amplified by the RF transceiver
RF filters along the Tx and Rx signal paths providing RF filtering
RF transceiver integrated in the u-blox UBX-R5 cellular chipset, performing modulation,
up-conversion and pre-amplification of the baseband signals for LTE transmission, and
performing down-conversion and demodulation of the RF signal for LTE reception
26 MHz Temperature-Controlled Crystal Oscillator (TCXO) generating the reference clock signal
for the RF transceiver, the Base-Band system and the GNSS system, when the related system is
in active mode or connected mode.