Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in LTE connected mode
- 1.5.1.3 VCC consumption in deep-sleep mode (low power mode and PSM enabled)
- 1.5.1.4 VCC current consumption in low power idle mode (low power mode enabled)
- 1.5.1.5 VCC current consumption in active mode (low power mode and PSM disabled)
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General purpose input / output (GPIO)
- 1.12 Reserved pin (RSVD)
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using low drop-out linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Guidelines for external battery charging circuit
- 2.2.1.7 Guidelines for external charging and power path management circuit
- 2.2.1.8 Guidelines for removing VCC supply
- 2.2.1.9 Additional guidelines for VCC supply circuit design
- 2.2.1.10 Guidelines for VCC supply layout design
- 2.2.1.11 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interfaces
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.6.1 UART interfaces
- 2.6.1.1 Guidelines for UART circuit design
- Providing 1 UART with the full RS-232 functionality (using the complete V.24 link)
- Providing 1 UART with the TXD, RXD, RTS, CTS, DTR and RI lines only
- Providing 1 UART with the TXD, RXD, RTS and CTS lines only
- Providing 2 UARTs with the TXD, RXD, RTS and CTS lines only
- Providing 1 UART with the TXD and RXD lines only
- Providing 2 UARTs with the TXD and RXD lines only
- Additional considerations
- 2.6.1.2 Guidelines for UART layout design
- 2.6.1.1 Guidelines for UART circuit design
- 2.6.2 USB interface
- 2.6.3 SPI interfaces
- 2.6.4 SDIO interface
- 2.6.5 DDC (I2C) interface
- 2.6.1 UART interfaces
- 2.7 Audio
- 2.8 General purpose input / output (GPIO)
- 2.9 Reserved pin (RSVD)
- 2.10 Module placement
- 2.11 Module footprint and paste mask
- 2.12 Schematic for SARA-R5 series module integration
- 2.13 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- Appendix
- A Migration between SARA modules
- B Glossary
- Related documents
- Revision history
- Contact
SARA-R5 series - System integration manual
UBX-19041356 - R03 Design-in Page 85 of 123
Confidential
2.6.5.2 Guidelines for DDC (I2C) layout design
The DDC (I2C) serial interface requires the same consideration regarding electro-magnetic
interference as any other digital interface. Keep the traces short and avoid coupling with RF line or
sensitive analog inputs, since the signals can cause the radiation of some harmonics of the digital
data frequency.
2.7 Audio
☞ Audio is not supported by the “00” product version of SARA-R5 series modules.
2.8 General purpose input / output (GPIO)
2.8.1 Guidelines for GPIO circuit design
A typical usage of SARA-R5 series modules’ GPIOs can be the following:
Network indication provided over GPIO1 pin (see Figure 66 / Table 37 below)
“GNSS supply enable” function provided by the GPIO2 pin
13
(see section 2.6.5)
“GNSS data ready” function provided by the GPIO3 pin
13
(see section 2.6.5)
“GNSS RTC sharing” function provided by the GPIO4 pin
13
(see section 2.6.5)
Module status / operating mode indication provided by a GPIO pin (see section 1.6.1)
SIM card detection provided over GPIO5 pin (see Figure 48 / Table 28 in section 2.5)
Antenna dynamic tuning provided over I2S_TXD and I2S_WA pins (see section 2.4.5)
SARA-R5 series
GPIO1
R1
R3
3V8
Network Indicator
R2
16
DL1
T1
Figure 66: Application circuit for network indication provided over GPIO1
Table 37: Components for network indication application circuit
13
Not supported by SARA-R510M8S modules
Reference
Description
Part number - Manufacturer
R1
10 k resistor 0402 5% 0.1 W
Generic manufacturer
R2
47 k resistor 0402 5% 0.1 W
Generic manufacturer
R3
820 resistor 0402 5% 0.1 W
Generic manufacturer
DL1
LED red SMT 0603
LTST-C190KRKT - Lite-on Technology Corporation
T1
NPN BJT transistor
BC847 - Infineon