Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in LTE connected mode
- 1.5.1.3 VCC consumption in deep-sleep mode (low power mode and PSM enabled)
- 1.5.1.4 VCC current consumption in low power idle mode (low power mode enabled)
- 1.5.1.5 VCC current consumption in active mode (low power mode and PSM disabled)
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General purpose input / output (GPIO)
- 1.12 Reserved pin (RSVD)
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using low drop-out linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Guidelines for external battery charging circuit
- 2.2.1.7 Guidelines for external charging and power path management circuit
- 2.2.1.8 Guidelines for removing VCC supply
- 2.2.1.9 Additional guidelines for VCC supply circuit design
- 2.2.1.10 Guidelines for VCC supply layout design
- 2.2.1.11 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interfaces
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.6.1 UART interfaces
- 2.6.1.1 Guidelines for UART circuit design
- Providing 1 UART with the full RS-232 functionality (using the complete V.24 link)
- Providing 1 UART with the TXD, RXD, RTS, CTS, DTR and RI lines only
- Providing 1 UART with the TXD, RXD, RTS and CTS lines only
- Providing 2 UARTs with the TXD, RXD, RTS and CTS lines only
- Providing 1 UART with the TXD and RXD lines only
- Providing 2 UARTs with the TXD and RXD lines only
- Additional considerations
- 2.6.1.2 Guidelines for UART layout design
- 2.6.1.1 Guidelines for UART circuit design
- 2.6.2 USB interface
- 2.6.3 SPI interfaces
- 2.6.4 SDIO interface
- 2.6.5 DDC (I2C) interface
- 2.6.1 UART interfaces
- 2.7 Audio
- 2.8 General purpose input / output (GPIO)
- 2.9 Reserved pin (RSVD)
- 2.10 Module placement
- 2.11 Module footprint and paste mask
- 2.12 Schematic for SARA-R5 series module integration
- 2.13 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- Appendix
- A Migration between SARA modules
- B Glossary
- Related documents
- Revision history
- Contact
SARA-R5 series - System integration manual
UBX-19041356 - R03 Design-in Page 68 of 123
Confidential
Figure 45 shows the example application circuits implementing impedance tuning and aperture
tuning. The module controls an RF switch which is responsible for selecting the appropriate matching
element for the operating band. Table 25 reports suggested components implementing the SP4T RF
switch functionality.
In Figure 45(a), tuning the antenna impedance optimizes the power delivered into the antenna by
dynamically adjusting the RF impedance seen by ANT pin of SARA-R5 series module. By creating a
tuned matching network for each operating band, the total radiated power (TRP) and the total
isotropic sensitivity (TIS) metrics are improved.
In Figure 45(b), antenna aperture tuning enables higher antenna efficiency over a wide frequency
range. The dynamically tunable components are added to the antenna structure itself, thereby
modifying the effective electrical length of the radiating element. Thus the resonant frequency of the
antenna is shifted into the module’s operating frequency band. Aperture tuning optimizes radiation
efficiency, insertion loss, isolation and rejection levels of the antenna.
SARA-R5 series
56ANT
GND
U1
34I2S_WA
35
I2S_TXD
Z2
L1
C1 C2
L2
Z1
Z3
(b)
SARA-R5 series
56ANT
GND
U1
34
I2S_WA
35
I2S_TXD
Z1 Z2
L1
C1 C2
L2
(a)
Figure 45: Examples of schematics for cellular antenna dynamic impedance tuning (a) and aperture tuning (b).
☞ Refer to the antenna datasheet and/or manufacturer for proper values of matching components
Z1, Z2, Z3, L1, L2, C1, C2. These components should have low losses to avoid degrading the
radiating efficiency of the antenna, thereby hindering the positive effects of dynamic tuning.
Manufacturer
Part number
Description
Peregrine Semiconductor
PE42442
30..6000 MHz UltraCMOS SP4T RF switch
Peregrine Semiconductor
PE613050
5..3000 MHz UltraCMOS SP4T RF switch
Peregrine Semiconductor
PE42440
50..3000 MHz UltraCMOS SP4T RF switch
Skyworks Solutions
SKY13414-485LF
100..6000 MHz SP4T antenna switch
Skyworks Solutions
SKY13626-685LF
400..3800 MHz SP4T high-power RF switch
Skyworks Solutions
SKY13380-350LF
20..3000 MHz SP4T high-power RF switch
AVX / Ethertronics
EC646
100..3000 MHz ultra-small SP4T RF switch
AVX / Ethertronics
EC686
100..3000 MHz ultra-low R
ON
SP4T RF switch
Qorvo
RF1654A
100..2700 MHz SP4T RF switch
Table 25: Examples of RF switches for cellular antenna dynamic tuning.