Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in LTE connected mode
- 1.5.1.3 VCC consumption in deep-sleep mode (low power mode and PSM enabled)
- 1.5.1.4 VCC current consumption in low power idle mode (low power mode enabled)
- 1.5.1.5 VCC current consumption in active mode (low power mode and PSM disabled)
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General purpose input / output (GPIO)
- 1.12 Reserved pin (RSVD)
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using low drop-out linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Guidelines for external battery charging circuit
- 2.2.1.7 Guidelines for external charging and power path management circuit
- 2.2.1.8 Guidelines for removing VCC supply
- 2.2.1.9 Additional guidelines for VCC supply circuit design
- 2.2.1.10 Guidelines for VCC supply layout design
- 2.2.1.11 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interfaces
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.6.1 UART interfaces
- 2.6.1.1 Guidelines for UART circuit design
- Providing 1 UART with the full RS-232 functionality (using the complete V.24 link)
- Providing 1 UART with the TXD, RXD, RTS, CTS, DTR and RI lines only
- Providing 1 UART with the TXD, RXD, RTS and CTS lines only
- Providing 2 UARTs with the TXD, RXD, RTS and CTS lines only
- Providing 1 UART with the TXD and RXD lines only
- Providing 2 UARTs with the TXD and RXD lines only
- Additional considerations
- 2.6.1.2 Guidelines for UART layout design
- 2.6.1.1 Guidelines for UART circuit design
- 2.6.2 USB interface
- 2.6.3 SPI interfaces
- 2.6.4 SDIO interface
- 2.6.5 DDC (I2C) interface
- 2.6.1 UART interfaces
- 2.7 Audio
- 2.8 General purpose input / output (GPIO)
- 2.9 Reserved pin (RSVD)
- 2.10 Module placement
- 2.11 Module footprint and paste mask
- 2.12 Schematic for SARA-R5 series module integration
- 2.13 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- Appendix
- A Migration between SARA modules
- B Glossary
- Related documents
- Revision history
- Contact
SARA-R5 series - System integration manual
UBX-19041356 - R03 Design-in Page 62 of 123
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2.4.3 GNSS antenna RF interface (ANT_GNSS)
☞ The GNSS antenna RF interface is not supported by SARA-R500S and SARA-R510S modules.
The antenna and its placement are critical system factors for accurate GNSS reception. Use of a
ground plane will minimize the effects of ground reflections and enhance the antenna efficiency. A
ground plane with a minimum diameter of 10 centimeter is recommended. Exercise care with rover
vehicles that emit RF energy from motors etc. as interference may extend into the GNSS band and
couple into the GNSS antenna suppressing the wanted signal.
Since SARA-R510M8S modules already include an internal SAW filter followed by an additional LNA
before the u-blox M8 GNSS chipset (as illustrated in Figure 4), they are optimized to work with passive
or active antennas without requiring additional external circuitry.
2.4.3.1 Guidelines for applications with a passive antenna
If a GNSS passive antenna with high gain and good sky view is used, together with a short 50 line
between antenna and receiver, and no jamming sources affect the GNSS passive antenna, the circuit
illustrated in Figure 40 can be used. This provides the minimum BoM cost and minimum board space.
SARA-R510M8S
31
ANT_GNSS
GND
Figure 40: Minimum circuit with GNSS passive antenna
Where best performance needs to be achieved, and improved jamming immunity is needed due to
strong out-band jammers close to the GNSS antenna (e.g. the cellular antenna), consider adding an
external SAW filter (as for example Murata SAFFB1G56AC0F0A, or SAFFB1G56AC0F7F) close to the
GNSS passive antenna, followed by an external LNA (as for example Maxim MAX2659ELT+, JRC New
Japan Radio NJG1143UA2, NXP BGU8006, Infineon BGA524N6), as illustrated in Figure 41.
SARA-R510M8S
31
ANT_GNSS
GND
F1
SAW LNA
U1
Figure 41: Typical circuit for best performance and improved jamming immunity with GNSS passive antenna