Integration Manual
Table Of Contents
- Document information
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in LTE connected mode
- 1.5.1.3 VCC consumption in deep-sleep mode (low power mode and PSM enabled)
- 1.5.1.4 VCC current consumption in low power idle mode (low power mode enabled)
- 1.5.1.5 VCC current consumption in active mode (low power mode and PSM disabled)
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interface
- 1.9 Data communication interfaces
- 1.10 Audio
- 1.11 General purpose input / output (GPIO)
- 1.12 Reserved pin (RSVD)
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using low drop-out linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Guidelines for external battery charging circuit
- 2.2.1.7 Guidelines for external charging and power path management circuit
- 2.2.1.8 Guidelines for removing VCC supply
- 2.2.1.9 Additional guidelines for VCC supply circuit design
- 2.2.1.10 Guidelines for VCC supply layout design
- 2.2.1.11 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interfaces
- 2.5 SIM interface
- 2.6 Data communication interfaces
- 2.6.1 UART interfaces
- 2.6.1.1 Guidelines for UART circuit design
- Providing 1 UART with the full RS-232 functionality (using the complete V.24 link)
- Providing 1 UART with the TXD, RXD, RTS, CTS, DTR and RI lines only
- Providing 1 UART with the TXD, RXD, RTS and CTS lines only
- Providing 2 UARTs with the TXD, RXD, RTS and CTS lines only
- Providing 1 UART with the TXD and RXD lines only
- Providing 2 UARTs with the TXD and RXD lines only
- Additional considerations
- 2.6.1.2 Guidelines for UART layout design
- 2.6.1.1 Guidelines for UART circuit design
- 2.6.2 USB interface
- 2.6.3 SPI interfaces
- 2.6.4 SDIO interface
- 2.6.5 DDC (I2C) interface
- 2.6.1 UART interfaces
- 2.7 Audio
- 2.8 General purpose input / output (GPIO)
- 2.9 Reserved pin (RSVD)
- 2.10 Module placement
- 2.11 Module footprint and paste mask
- 2.12 Schematic for SARA-R5 series module integration
- 2.13 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- Appendix
- A Migration between SARA modules
- B Glossary
- Related documents
- Revision history
- Contact
SARA-R5 series - System integration manual
UBX-19041356 - R03 Design-in Page 46 of 123
Confidential
2.2.1.8 Guidelines for removing VCC supply
Removing the VCC power can be useful to minimize the current consumption when the SARA-R5
series modules are switched off. The application processor can disconnect the VCC supply source
from the module and zero out the module’s current.
The VCC supply source can be removed using an appropriate low-leakage load switch or p-channel
MOSFET controlled by the application processor as shown in Figure 25, given that the external switch
has provided:
Very low leakage current (for example, less than 1 A), to minimize the current consumption
Very low R
DS(ON)
series resistance (for example, less than 50 m), to minimize voltage drops
Adequate maximum drain current (see the SARA-R5 series data sheet [1] for module current
consumption figures)
C3
GND
C2C1 C4
SARA-R5 series
52
VCC
53
VCC
51
VCC
VCC supply source
GND
C5
U1
VOUTVIN
VBIAS
ON
CT
GND
4
V_INT
15
PWR_ON
R1
R2
T1
GPIO
Application
Processor
GPIO
GPIO
Figure 25: Example of application circuit for VCC supply removal
Reference
Description
Part number - Manufacturer
C1
10 µF capacitor ceramic X5R 0603 20% 6.3 V
GRM188R60J106ME47 - Murata
C2
10 nF capacitor ceramic X7R 0402 10% 16 V
GRT155R71C103KE01 - Murata
C3
100 nF capacitor ceramic X7R 0402 10% 16 V
GCM155R71C104KA55 - Murata
C4
68 pF capacitor ceramic C0G 0402 5% 50 V
GRM1555C1H680JA16 - Murata
C5
15 pF capacitor ceramic C0G 0402 5% 25 V
GJM1555C1H150JB01 - Murata
R1, R3
47 k resistor 0402 5% 0.1 W
Generic manufacturer
R2
10 k resistor 0402 5% 0.1 W
Generic manufacturer
T1
NPN BJT transistor
BC847 - Infineon
U1
Ultra-low resistance load switch
TPS22967 - Texas Instruments
Table 13: Components for VCC supply removal application circuit
☞ It is highly recommended to avoid an abrupt removal of the VCC supply during SARA-R5 series
normal operations: the VCC supply can be removed only after V_INT goes low, indicating that the
module has entered deep-sleep power saving mode or power-off mode.
☞ See the section 2.2.1.9, and in particular Figure 26 / Table 14, for the parts recommended to be
provided if the application device integrates an internal antenna.